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Searched refs:mmCP_RB1_RPTR_ADDR (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h503 #define mmCP_RB1_RPTR_ADDR 0x3062 macro
H A Dgfx_7_2_d.h208 #define mmCP_RB1_RPTR_ADDR 0x3062 macro
H A Dgfx_7_0_d.h208 #define mmCP_RB1_RPTR_ADDR 0x3062 macro
H A Dgfx_8_0_d.h232 #define mmCP_RB1_RPTR_ADDR 0x3062 macro
H A Dgfx_8_1_d.h233 #define mmCP_RB1_RPTR_ADDR 0x3062 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2169 WREG32(mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v6_0_cp_compute_resume()
H A Dgfx_v10_0.c6154 WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v10_0_cp_gfx_resume()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2452 #define mmCP_RB1_RPTR_ADDR … macro
H A Dgc_9_2_1_offset.h2667 #define mmCP_RB1_RPTR_ADDR … macro
H A Dgc_9_1_offset.h2729 #define mmCP_RB1_RPTR_ADDR … macro
H A Dgc_10_1_0_offset.h4793 #define mmCP_RB1_RPTR_ADDR … macro
H A Dgc_10_3_0_offset.h4446 #define mmCP_RB1_RPTR_ADDR … macro