Searched refs:mmCP_MQD_BASE_ADDR_HI (Results 1 – 13 of 13) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | polaris10_pwrvirus.h | 1506 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI }, 1516 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI }, 1526 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI }, 1536 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI },
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v10_1.c | 760 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);
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H A D | gfx_v9_0.c | 3423 WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR_HI, in gfx_v9_0_kiq_init_register()
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H A D | gfx_v10_0.c | 6661 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, in gfx_v10_0_kiq_init_register()
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_2_d.h | 581 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
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H A D | gfx_7_0_d.h | 568 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
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H A D | gfx_8_0_d.h | 631 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
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H A D | gfx_8_1_d.h | 631 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 2821 #define mmCP_MQD_BASE_ADDR_HI … macro
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H A D | gc_9_2_1_offset.h | 3005 #define mmCP_MQD_BASE_ADDR_HI … macro
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H A D | gc_9_1_offset.h | 3049 #define mmCP_MQD_BASE_ADDR_HI … macro
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H A D | gc_10_1_0_offset.h | 5303 #define mmCP_MQD_BASE_ADDR_HI … macro
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H A D | gc_10_3_0_offset.h | 4938 #define mmCP_MQD_BASE_ADDR_HI … macro
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