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Searched refs:mmCP_DMA_ME_SRC_ADDR (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h402 #define mmCP_DMA_ME_SRC_ADDR 0x2180 macro
H A Dgfx_7_2_d.h476 #define mmCP_DMA_ME_SRC_ADDR 0xc080 macro
H A Dgfx_7_0_d.h466 #define mmCP_DMA_ME_SRC_ADDR 0xc080 macro
H A Dgfx_8_0_d.h514 #define mmCP_DMA_ME_SRC_ADDR 0xc080 macro
H A Dgfx_8_1_d.h514 #define mmCP_DMA_ME_SRC_ADDR 0xc080 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4753 #define mmCP_DMA_ME_SRC_ADDR … macro
H A Dgc_9_2_1_offset.h4939 #define mmCP_DMA_ME_SRC_ADDR … macro
H A Dgc_9_1_offset.h4983 #define mmCP_DMA_ME_SRC_ADDR … macro
H A Dgc_10_1_0_offset.h7245 #define mmCP_DMA_ME_SRC_ADDR … macro
H A Dgc_10_3_0_offset.h6872 #define mmCP_DMA_ME_SRC_ADDR … macro