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Searched refs:mmCP_DMA_ME_CONTROL (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h480 #define mmCP_DMA_ME_CONTROL 0xc078 macro
H A Dgfx_7_0_d.h470 #define mmCP_DMA_ME_CONTROL 0xc078 macro
H A Dgfx_8_0_d.h518 #define mmCP_DMA_ME_CONTROL 0xc078 macro
H A Dgfx_8_1_d.h518 #define mmCP_DMA_ME_CONTROL 0xc078 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4739 #define mmCP_DMA_ME_CONTROL … macro
H A Dgc_9_2_1_offset.h4925 #define mmCP_DMA_ME_CONTROL … macro
H A Dgc_9_1_offset.h4969 #define mmCP_DMA_ME_CONTROL … macro
H A Dgc_10_1_0_offset.h7231 #define mmCP_DMA_ME_CONTROL … macro
H A Dgc_10_3_0_offset.h6858 #define mmCP_DMA_ME_CONTROL … macro