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Searched refs:mmCP_DISPATCH_INDR_ADDR (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h552 #define mmCP_DISPATCH_INDR_ADDR 0xc0f6 macro
H A Dgfx_8_0_d.h552 #define mmCP_DISPATCH_INDR_ADDR 0xc0f6 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4881 #define mmCP_DISPATCH_INDR_ADDR … macro
H A Dgc_9_1_offset.h5111 #define mmCP_DISPATCH_INDR_ADDR … macro
H A Dgc_9_2_1_offset.h5067 #define mmCP_DISPATCH_INDR_ADDR … macro
H A Dgc_10_1_0_offset.h7399 #define mmCP_DISPATCH_INDR_ADDR … macro
H A Dgc_10_3_0_offset.h7034 #define mmCP_DISPATCH_INDR_ADDR … macro