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Searched refs:mmCP_DFY_DATA_0 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu7_smumgr.c519 cgs_write_register(hwmgr->device, mmCP_DFY_DATA_0, section->dfy_data[i]); in execute_pwr_dfy_table()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h179 #define mmCP_DFY_DATA_0 0x3024 macro
H A Dgfx_7_0_d.h179 #define mmCP_DFY_DATA_0 0x3024 macro
H A Dgfx_8_0_d.h201 #define mmCP_DFY_DATA_0 0x3024 macro
H A Dgfx_8_1_d.h201 #define mmCP_DFY_DATA_0 0x3024 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2306 #define mmCP_DFY_DATA_0 … macro
H A Dgc_9_2_1_offset.h2521 #define mmCP_DFY_DATA_0 … macro
H A Dgc_9_1_offset.h2583 #define mmCP_DFY_DATA_0 … macro