Searched refs:mmCP_CPC_IC_OP_CNTL (Results 1 – 8 of 8) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_8_0_d.h | 349 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
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H A D | gfx_8_1_d.h | 349 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v10_0.c | 5583 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 5585 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 5589 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 6249 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode() 6251 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_cp_compute_load_microcode() 6255 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode()
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 2609 #define mmCP_CPC_IC_OP_CNTL … macro
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H A D | gc_9_2_1_offset.h | 2813 #define mmCP_CPC_IC_OP_CNTL … macro
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H A D | gc_9_1_offset.h | 2879 #define mmCP_CPC_IC_OP_CNTL … macro
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H A D | gc_10_1_0_offset.h | 10283 #define mmCP_CPC_IC_OP_CNTL … macro
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H A D | gc_10_3_0_offset.h | 10005 #define mmCP_CPC_IC_OP_CNTL … macro
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