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Searched refs:mmCPF_EDC_ROQ_CNT (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h117 #define mmCPF_EDC_ROQ_CNT … macro
H A Dgc_9_0_offset.h2641 #define mmCPF_EDC_ROQ_CNT … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4.c49 { SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT), 0, 1, 1 },
149 { "CPF_ROQ_ME2", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),
152 { "CPF_ROQ_ME1", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),
H A Dgfx_v9_0.c4266 { SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT), 0, 1, 1},
5993 { "CPF_ROQ_ME1", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),
5997 { "CPF_ROQ_ME2", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),
H A Dgfx_v8_0.c1465 mmCPF_EDC_ROQ_CNT,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2814 #define mmCPF_EDC_ROQ_CNT 0x3189 macro