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Searched refs:mmCM1_CM_CONTROL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h2053 #define mmCM1_CM_CONTROL macro
H A Ddcn_3_0_3_offset.h3305 #define mmCM1_CM_CONTROL macro
H A Ddcn_3_0_1_offset.h4120 #define mmCM1_CM_CONTROL macro
H A Ddcn_1_0_offset.h4058 #define mmCM1_CM_CONTROL macro
H A Ddcn_2_1_0_offset.h4008 #define mmCM1_CM_CONTROL macro
H A Ddcn_3_0_2_offset.h4661 #define mmCM1_CM_CONTROL macro
H A Ddcn_2_0_0_offset.h4946 #define mmCM1_CM_CONTROL macro
H A Ddcn_3_0_0_offset.h4708 #define mmCM1_CM_CONTROL macro