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Searched refs:mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1810 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h3008 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h3819 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h3741 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h4364 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h4679 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h4411 #define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX … macro