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Searched refs:mmCM0_CM_MEM_PWR_CTRL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1775 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_3_0_3_offset.h2973 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_3_0_1_offset.h3784 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_1_0_offset.h3902 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_2_1_0_offset.h3706 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_3_0_2_offset.h4329 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_2_0_0_offset.h4644 #define mmCM0_CM_MEM_PWR_CTRL macro
H A Ddcn_3_0_0_offset.h4376 #define mmCM0_CM_MEM_PWR_CTRL macro