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Searched refs:mmCM0_CM_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1504 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h2618 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h3429 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h3583 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h3435 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h3974 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h4373 #define mmCM0_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h4021 #define mmCM0_CM_CONTROL_BASE_IDX … macro