Home
last modified time | relevance | path

Searched refs:mmCGTS_SA0_QUAD1_SM_CTRL_REG (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h9899 #define mmCGTS_SA0_QUAD1_SM_CTRL_REG … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c7812 mmCGTS_SA0_QUAD1_SM_CTRL_REG, in gfx_v10_0_apply_medium_grain_clock_gating_workaround()