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Searched refs:mmCGTS_CU5_LDS_SQ_CTRL_REG (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c198 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
H A Dgfx_v8_0.c288 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
562 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
658 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1532 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
H A Dgfx_7_0_d.h1511 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
H A Dgfx_8_0_d.h1725 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
H A Dgfx_8_1_d.h1693 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6365 #define mmCGTS_CU5_LDS_SQ_CTRL_REG macro
H A Dgc_9_2_1_offset.h6599 #define mmCGTS_CU5_LDS_SQ_CTRL_REG macro
H A Dgc_9_1_offset.h6587 #define mmCGTS_CU5_LDS_SQ_CTRL_REG macro