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Searched refs:mmAFMT1_AFMT_MEM_PWR_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5169 #define mmAFMT1_AFMT_MEM_PWR_BASE_IDX macro
H A Ddcn_3_0_1_offset.h8139 #define mmAFMT1_AFMT_MEM_PWR_BASE_IDX macro
H A Ddcn_3_0_2_offset.h9751 #define mmAFMT1_AFMT_MEM_PWR_BASE_IDX macro
H A Ddcn_3_0_0_offset.h10887 #define mmAFMT1_AFMT_MEM_PWR_BASE_IDX macro