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Searched refs:mlxsw_reg_write (Results 1 – 25 of 36) sorted by relevance

12

/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_nve_vxlan.c210 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_set()
219 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_clear()
229 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp1_nve_vxlan_rtdp_set()
320 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl); in mlxsw_sp2_nve_vxlan_learning_set()
357 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
376 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
379 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
394 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_clear()
396 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_clear()
[all …]
H A Dspectrum_acl_ctcam.c23 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_ctcam_region_resize()
36 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(prcr), prcr_pl); in mlxsw_sp_acl_ctcam_region_move()
75 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_insert()
96 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_remove()
117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_action_replace()
H A Dspectrum1_mr_tcam.c57 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_replace()
79 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_remove()
184 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_alloc()
195 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_free()
211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_parman_resize()
226 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rrcr), rrcr_pl); in mlxsw_sp1_mr_tcam_region_parman_move()
H A Dspectrum_ipip.c180 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre4()
219 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_decap_config_gre4()
395 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre6()
433 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_decap_config_gre6()
542 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tieem), tieem_pl); in mlxsw_sp_ipip_ecn_encap_init_one()
573 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tidem), tidem_pl); in mlxsw_sp_ipip_ecn_decap_init_one()
H A Dcore_linecards.c162 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_lock()
185 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_component_update()
206 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_block_download()
227 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_component_verify()
247 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_activate()
300 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_cancel()
321 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_release()
678 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl); in mlxsw_linecard_ready_set()
828 return mlxsw_reg_write(linecard->linecards->mlxsw_core, in __mlxsw_linecard_fix_fsm_state()
887 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mbct), in mlxsw_linecard_ini_transfer()
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H A Dspectrum.c204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_clear()
356 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
382 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
393 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
431 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
440 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
674 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_map()
692 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_unmap()
2582 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl); in mlxsw_sp_cpu_policers_set()
2629 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_sp_trap_groups_set()
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H A Dspectrum_dcb.c257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpts), qpts_pl); in mlxsw_sp_port_dcb_app_update_qpts()
269 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qrwe), qrwe_pl); in mlxsw_sp_port_dcb_app_update_qrwe()
307 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdp), qpdp_pl); in mlxsw_sp_port_dcb_app_update_qpdp()
321 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdpm), qpdpm_pl); in mlxsw_sp_port_dcb_app_update_qpdpm()
335 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdsm), qpdsm_pl); in mlxsw_sp_port_dcb_app_update_qpdsm()
527 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), in mlxsw_sp_port_pfc_set()
H A Dspectrum_ptp.c149 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp_ptp_phc_adjfreq()
179 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); in mlxsw_sp1_ptp_phc_settime()
186 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_settime()
369 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp2_ptp_phc_settime()
405 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp2_ptp_adjtime()
878 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl); in mlxsw_sp_ptp_mtptpt_set()
893 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
902 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl); in mlxsw_sp1_ptp_mtpppc_set()
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl); in mlxsw_sp1_ptp_shaper_params_set()
1204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp1_ptp_port_shaper_set()
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H A Dspectrum_acl_erp.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_update()
401 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_add()
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_del()
436 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_enable()
454 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_disable()
660 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_add()
677 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_del()
1365 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_init()
1376 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_param_init()
H A Dspectrum2_acl_tcam.c113 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_acl_tcam_init()
118 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pgcr), pgcr_pl); in mlxsw_sp2_acl_tcam_init()
H A Dspectrum_fid.c431 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_op()
458 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_edit_op()
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in mlxsw_sp_fid_vni_to_fid_map()
507 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in mlxsw_sp_fid_vid_to_fid_map()
534 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in mlxsw_sp_fid_port_vid_to_fid_rif_update_one()
635 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(reiv), reiv_pl); in mlxsw_sp_fid_reiv_handle()
754 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in __mlxsw_sp_fid_port_vid_map()
914 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smpe), smpe_pl); in mlxsw_sp_fid_mpe_table_map()
935 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(reiv), reiv_pl); in mlxsw_sp_fid_erif_eport_to_vid_map_one()
1676 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfgc), sfgc_pl); in mlxsw_sp_fid_flood_table_init()
H A Dspectrum_span.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_phys_configure()
208 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_deconfigure_common()
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap4_configure()
604 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap6_configure()
663 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_vlan_configure()
1240 return mlxsw_reg_write(span->mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); in __mlxsw_sp_span_trigger_port_bind()
1378 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpagr), mpagr_pl); in mlxsw_sp2_span_trigger_global_bind()
1434 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(momte), momte_pl); in __mlxsw_sp2_span_trigger_global_enable()
1730 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp2_span_policer_id_base_set()
H A Dspectrum_acl_atcam.c287 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perar), perar_pl); in mlxsw_sp_acl_atcam_region_associate()
408 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_insert()
437 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_remove()
466 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_action_replace()
H A Dspectrum_nve.c398 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnumt), tnumt_pl); in mlxsw_sp_nve_mc_record_refresh()
782 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_nve_fdb_flush_by_fid()
1021 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqdr), tnqdr_pl); in mlxsw_sp_port_nve_init()
1033 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqcr), tnqcr_pl); in mlxsw_sp_nve_qos_init()
1047 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tneem), in mlxsw_sp_nve_ecn_encap_init()
1067 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tndem), tndem_pl); in __mlxsw_sp_nve_ecn_decap_init()
H A Dspectrum_acl_flex_actions.c27 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp_act_kvdl_set_add()
98 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbs), ppbs_pl); in mlxsw_sp_act_kvdl_fwd_entry_add()
H A Dspectrum_acl_bloom_filter.c441 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_add()
478 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_del()
H A Dcore.c256 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_core_trap_groups_set()
1104 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_lock()
1117 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_update()
1129 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl); in mlxsw_core_fw_fsm_block_download()
1142 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_verify()
1153 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_activate()
1187 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_cancel()
1198 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_release()
2660 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); in mlxsw_core_trap_unregister()
2998 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, in mlxsw_reg_write() function
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H A Dspectrum_buffers.c193 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); in mlxsw_sp_sb_pr_write()
217 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); in mlxsw_sp_sb_pr_desc_write()
232 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl); in mlxsw_sp_sb_cm_write()
261 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl); in mlxsw_sp_sb_pm_write()
474 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); in mlxsw_sp_hdroom_configure_buffers()
498 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb), pptb_pl); in mlxsw_sp_hdroom_configure_priomap()
518 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); in mlxsw_sp_hdroom_configure_int_buf()
1152 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl); in mlxsw_sp_sb_mms_init()
H A Dspectrum_acl_tcam.c226 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pagt), pagt_pl); in mlxsw_sp_acl_tcam_group_update()
318 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_bind()
333 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_unbind()
590 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_alloc()
606 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_free()
617 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_enable()
628 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_disable()
H A Dcore_hwmon.c144 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_rst_store()
234 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_hwmon_pwm_store()
631 err = mlxsw_reg_write(mlxsw_hwmon->core, in mlxsw_hwmon_temp_init()
763 err = mlxsw_reg_write(mlxsw_hwmon->core, in mlxsw_hwmon_gearbox_init()
H A Dcore_env.c524 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_reset()
642 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_enable_set()
661 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmmp), pmmp_pl); in mlxsw_env_module_low_power_set()
838 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_env_temp_event_set()
1072 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_oper_state_event_enable()
H A Dspectrum_port_range.c43 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pprr), pprr_pl); in mlxsw_sp_port_range_reg_configure()
H A Dspectrum_router.c230 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); in mlxsw_sp_rif_counter_edit()
323 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ricnt), ricnt_pl); in mlxsw_sp_rif_counter_clear()
595 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta), ralta_pl); in mlxsw_sp_lpm_tree_alloc()
606 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta), ralta_pl); in mlxsw_sp_lpm_tree_free()
630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralst), ralst_pl); in mlxsw_sp_lpm_tree_left_struct_set()
798 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(raltb), raltb_pl); in mlxsw_sp_vr_lpm_tree_bind()
809 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(raltb), raltb_pl); in mlxsw_sp_vr_lpm_tree_unbind()
1676 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); in mlxsw_sp_rif_ipip_lb_op()
3664 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in __mlxsw_sp_nexthop_eth_update()
4655 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_adj_trap_entry_init()
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H A Dspectrum2_kvdl.c119 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(iedr), iedr_pl); in mlxsw_sp2_kvdl_rec_del()
H A Dspectrum2_mr_tcam.c44 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pemrbt), pemrbt_pl); in mlxsw_sp2_mr_tcam_bind_group()

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