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Searched refs:miselect (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dmachine.c399 VMSTATE_UINTTL(env.miselect, RISCVCPU),
H A Dcpu.h245 target_ulong miselect; member
H A Dcsr.c1686 iselect = &env->miselect; in rmw_xiselect()
1772 isel = env->miselect; in rmw_xireg()