Home
last modified time | relevance | path

Searched refs:misc_reg (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra124.c189 .misc_reg = PLLX_MISC,
223 .misc_reg = PLLC_MISC,
277 .misc_reg = PLLC2_MISC,
299 .misc_reg = PLLC3_MISC,
358 .misc_reg = PLLC4_MISC,
421 .misc_reg = PLLM_MISC,
478 .misc_reg = PLLE_MISC,
554 .misc_reg = PLLP_MISC,
583 .misc_reg = PLLA_MISC,
628 .misc_reg = PLLD_MISC,
[all …]
H A Dclk-tegra114.c185 .misc_reg = PLLC_MISC,
236 .misc_reg = PLLC2_MISC,
258 .misc_reg = PLLC3_MISC,
307 .misc_reg = PLLM_MISC,
347 .misc_reg = PLLP_MISC,
377 .misc_reg = PLLA_MISC,
413 .misc_reg = PLLD_MISC,
431 .misc_reg = PLLD2_MISC,
473 .misc_reg = PLLU_MISC,
502 .misc_reg = PLLX_MISC,
[all …]
H A Dclk-tegra20.c285 .misc_reg = PLLC_MISC,
301 .misc_reg = PLLM_MISC,
317 .misc_reg = PLLP_MISC,
335 .misc_reg = PLLA_MISC,
351 .misc_reg = PLLD_MISC,
373 .misc_reg = PLLU_MISC,
390 .misc_reg = PLLX_MISC,
408 .misc_reg = PLLE_MISC,
H A Dclk-tegra30.c360 .misc_reg = PLLC_MISC,
389 .misc_reg = PLLM_MISC,
410 .misc_reg = PLLP_MISC,
428 .misc_reg = PLLA_MISC,
445 .misc_reg = PLLD_MISC,
462 .misc_reg = PLLD2_MISC,
479 .misc_reg = PLLU_MISC,
497 .misc_reg = PLLX_MISC,
516 .misc_reg = PLLE_MISC,
H A Dclk-tegra210.c1661 .misc_reg = PLLX_MISC0,
1712 .misc_reg = PLLC_MISC0,
1751 .misc_reg = PLLC2_MISC0,
1781 .misc_reg = PLLC3_MISC0,
1900 .misc_reg = PLLM_MISC2,
1972 .misc_reg = PLLE_MISC0,
2048 .misc_reg = PLLP_MISC0,
2121 .misc_reg = PLLA_MISC0,
2168 .misc_reg = PLLD_MISC0,
2251 .misc_reg = PLLDP_MISC,
[all …]
H A Dclk.h309 u32 misc_reg; member
H A Dclk-pll.c232 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
239 #define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p)
304 lock_addr += pll->params->misc_reg; in clk_pll_wait_for_lock()
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dclock.c590 u32 base_reg, misc_reg; in clock_set_rate() local
626 misc_reg = readl(&pll->pll_misc); in clock_set_rate()
627 misc_reg &= ~(pllinfo->kcp_mask << pllinfo->kcp_shift); in clock_set_rate()
628 misc_reg |= cpcon << pllinfo->kcp_shift; in clock_set_rate()
629 writel(misc_reg, &pll->pll_misc); in clock_set_rate()