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Searched refs:misc_control (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dsdram_ast2500.h108 u32 misc_control; /* offset 0x0C */ member
/openbmc/qemu/hw/display/
H A Dsm501.c480 uint32_t misc_control; member
953 ret = s->misc_control; in sm501_system_config_read()
1014 s->misc_control &= 0xEF; in sm501_system_config_write()
1015 s->misc_control |= value & 0xFF7FFF10; in sm501_system_config_write()
1854 s->misc_control = SM501_MISC_DAC_POWER; in sm501_reset()
1947 VMSTATE_UINT32(misc_control, SM501State),
2156 s->state.misc_control |= 1; in sm501_reset_pci()
/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_ast2500.c370 writel(SDRAM_MISC_DDR4_TREFRESH, &info->regs->misc_control); in ast2500_sdrammc_init_ddr4()
473 writel(SDRAM_MISC_DDR4_TREFRESH, &priv->regs->misc_control); in ast2500_sdrammc_probe()