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Searched refs:min_read_sample_delay (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c1087 u32 min_read_sample_delay, max_read_sample_delay, max_rl_phase; in ddr3_odt_read_dynamic_config() local
1095 ddr3_get_min_max_read_sample_delay(cs_ena, reg, &min_read_sample_delay, in ddr3_odt_read_dynamic_config()
1108 reg |= (((min_read_sample_delay - 1) & 0xF) << REG_ODT_ON_CTL_RD_OFFS); in ddr3_odt_read_dynamic_config()