| /openbmc/linux/arch/arm/kernel/ |
| H A D | smp_tlb.c | 96 unsigned int midr = read_cpuid_id(); in erratum_a15_798181_init() local
125 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) { in erratum_a15_798181_init()
127 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) { in erratum_a15_798181_init()
129 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) { in erratum_a15_798181_init()
136 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) { in erratum_a15_798181_init()
143 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) { in erratum_a15_798181_init()
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| H A D | setup.c | 686 struct proc_info_list *lookup_processor(u32 midr) in lookup_processor() argument
688 struct proc_info_list *list = lookup_processor_type(midr); in lookup_processor()
692 smp_processor_id(), midr); in lookup_processor()
702 unsigned int midr = read_cpuid_id(); in setup_processor() local
703 struct proc_info_list *list = lookup_processor(midr); in setup_processor()
720 list->cpu_name, midr, midr & 15, in setup_processor()
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| /openbmc/linux/tools/arch/arm64/include/asm/ |
| H A D | cputype.h | 25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK) argument
28 #define MIDR_PARTNUM(midr) \ argument
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \ argument
36 #define MIDR_VARIANT(midr) \ argument
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \ argument
41 (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
240 u32 _model = midr & MIDR_CPU_MODEL_MASK; in midr_is_cpu_model_range()
248 return midr_is_cpu_model_range(midr, range->model, in is_midr_in_range()
[all …]
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | cputype.h | 25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK) argument
28 #define MIDR_PARTNUM(midr) \ argument
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \ argument
36 #define MIDR_VARIANT(midr) \ argument
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \ argument
41 (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
261 u32 _model = midr & MIDR_CPU_MODEL_MASK; in midr_is_cpu_model_range()
269 return midr_is_cpu_model_range(midr, range->model, in is_midr_in_range()
[all …]
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| /openbmc/qemu/linux-user/arm/ |
| H A D | target_proc.h | 26 midr_rev = FIELD_EX32(cpu->midr, MIDR_EL1, REVISION); in open_cpuinfo()
27 midr_part = FIELD_EX32(cpu->midr, MIDR_EL1, PARTNUM); in open_cpuinfo()
28 midr_var = FIELD_EX32(cpu->midr, MIDR_EL1, VARIANT); in open_cpuinfo()
29 midr_impl = FIELD_EX32(cpu->midr, MIDR_EL1, IMPLEMENTER); in open_cpuinfo()
38 midr_var = (cpu->midr >> 16) & 0x7f; in open_cpuinfo()
46 midr_part = cpu->midr >> 4; in open_cpuinfo()
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| /openbmc/u-boot/board/renesas/ebisu/ |
| H A D | ebisu.c | 70 unsigned long midr, cputype; in reset_cpu() local
72 asm volatile("mrs %0, midr_el1" : "=r" (midr)); in reset_cpu()
73 cputype = (midr >> 4) & 0xfff; in reset_cpu()
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| /openbmc/u-boot/board/renesas/eagle/ |
| H A D | eagle.c | 94 unsigned long midr, cputype; in reset_cpu() local
96 asm volatile("mrs %0, midr_el1" : "=r" (midr)); in reset_cpu()
97 cputype = (midr >> 4) & 0xfff; in reset_cpu()
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| /openbmc/u-boot/board/renesas/draak/ |
| H A D | draak.c | 97 unsigned long midr, cputype; in reset_cpu() local
99 asm volatile("mrs %0, midr_el1" : "=r" (midr)); in reset_cpu()
100 cputype = (midr >> 4) & 0xfff; in reset_cpu()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | cpu32.c | 134 cpu->midr = 0x41069265; in arm926_initfn()
161 cpu->midr = 0x41059461; in arm946_initfn()
175 cpu->midr = 0x4106a262; in arm1026_initfn()
223 cpu->midr = 0x4107b362; in arm1136_r2_initfn()
254 cpu->midr = 0x4117b363; in arm1136_initfn()
286 cpu->midr = 0x410fb767; in arm1176_initfn()
316 cpu->midr = 0x410fb022; in arm11mpcore_initfn()
354 cpu->midr = 0x410fc080; in cortex_a8_initfn()
429 cpu->midr = 0x410fc090; in cortex_a9_initfn()
494 cpu->midr = 0x410fc075; in cortex_a7_initfn()
[all …]
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| H A D | cpu-v7m.c | 52 cpu->midr = 0x410cc200; in cortex_m0_initfn()
85 cpu->midr = 0x410fc231; in cortex_m3_initfn()
112 cpu->midr = 0x410fc240; /* r0p0 */ in cortex_m4_initfn()
142 cpu->midr = 0x411fc272; /* r1p2 */ in cortex_m7_initfn()
173 cpu->midr = 0x410fd213; /* r0p3 */ in cortex_m33_initfn()
208 cpu->midr = 0x410fd221; /* r0p1 */ in cortex_m55_initfn()
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| H A D | cpu64.c | 74 cpu->midr = 0x411fd040; in aarch64_a35_initfn()
271 cpu->midr = 0x412FD050; /* r2p0 */ in aarch64_a55_initfn()
310 cpu->midr = 0x410fd083; in aarch64_a72_initfn()
396 cpu->midr = 0x414fd0b1; /* r4p1 */ in aarch64_a76_initfn()
435 cpu->midr = 0x461f0010; in aarch64_a64fx_initfn()
636 cpu->midr = 0x414fd0c1; /* r4p1 */ in aarch64_neoverse_n1_initfn()
711 cpu->midr = 0x411FD402; /* r1p2 */ in aarch64_neoverse_v1_initfn()
903 cpu->midr = 0x412FD471; /* r2p1 */ in aarch64_a710_initfn()
1001 cpu->midr = 0x410FD493; /* r0p3 */ in aarch64_neoverse_n2_initfn()
1115 cpu->midr = t; in aarch64_max_tcg_initfn()
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| /openbmc/u-boot/board/highbank/ |
| H A D | highbank.c | 118 uint32_t midr; in is_highbank() local
120 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); in is_highbank()
122 return (midr & 0xfff0) == 0xc090; in is_highbank()
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| /openbmc/linux/arch/arm64/kernel/ |
| H A D | cpuinfo.c | 184 u32 midr = cpuinfo->reg_midr; in c_show() local
194 MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); in c_show()
234 MIDR_IMPLEMENTOR(midr)); in c_show()
236 seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); in c_show()
237 seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); in c_show()
238 seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr)); in c_show()
296 CPUREGS_ATTR_RO(midr_el1, midr);
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| H A D | cpu_errata.c | 21 u32 midr = read_cpuid_id(), revidr; in is_affected_midr_range() local
24 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
30 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
205 u32 midr = read_cpuid_id(); in has_neoverse_n1_erratum_1542419() local
210 return is_midr_in_range(midr, &range) && has_dic; in has_neoverse_n1_erratum_1542419()
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| H A D | proton-pack.c | 263 u32 midr = read_cpuid_id(); in spectre_v2_get_sw_mitigation_cb() local
264 if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) && in spectre_v2_get_sw_mitigation_cb()
265 ((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1)) in spectre_v2_get_sw_mitigation_cb()
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| /openbmc/linux/include/ras/ |
| H A D | ras_event.h | 179 __field(u64, midr)
194 __entry->midr = proc->midr;
206 __entry->affinity, __entry->mpidr, __entry->midr,
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| /openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.h | 634 u8 midr = pdev->revision & 0xF0; in is_rvu_otx2() local
636 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_rvu_otx2()
637 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_rvu_otx2()
638 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_rvu_otx2()
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| /openbmc/linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_common.h | 567 u8 midr = pdev->revision & 0xF0; in is_dev_otx2() local
569 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_dev_otx2()
570 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_dev_otx2()
571 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_dev_otx2()
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| /openbmc/linux/tools/perf/util/ |
| H A D | arm-spe.c | 49 u64 midr; member
518 static u64 arm_spe__synth_data_source(const struct arm_spe_record *record, u64 midr) in arm_spe__synth_data_source() argument
521 bool is_neoverse = is_midr_in_range_list(midr, neoverse_spe); in arm_spe__synth_data_source()
554 data_src = arm_spe__synth_data_source(record, spe->midr); in arm_spe_sample()
1297 u64 midr = strtol(cpuid, NULL, 16); in arm_spe_process_auxtrace_info() local
1317 spe->midr = midr; in arm_spe_process_auxtrace_info()
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| /openbmc/linux/arch/arm/include/asm/ |
| H A D | cputype.h | 118 struct proc_info_list *lookup_processor(u32 midr);
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| /openbmc/linux/drivers/firmware/efi/ |
| H A D | cper-arm.c | 245 printk("%sMIDR: 0x%016llx\n", pfx, proc->midr); in cper_print_proc_arm()
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| /openbmc/qemu/target/arm/hvf/ |
| H A D | hvf.c | 310 uint64_t midr; member
882 r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &ahcf->midr); in hvf_arm_get_host_cpu_features()
924 cpu->midr = arm_host_cpu_features.midr; in hvf_arm_set_cpu_features_from_host()
980 arm_cpu->midr); in hvf_arch_init_vcpu()
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| /openbmc/linux/include/linux/ |
| H A D | cper.h | 413 u64 midr; member
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| /openbmc/qemu/target/arm/ |
| H A D | cpu64.c | 613 cpu->midr = 0x411fd070; in aarch64_a57_initfn()
671 cpu->midr = 0x410fd034; in aarch64_a53_initfn()
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| /openbmc/u-boot/board/hisilicon/hikey/ |
| H A D | README | 138 INFO: [BDID] [fff91c18] midr: 0x410fd033
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