Searched refs:mideleg (Results 1 – 5 of 5) sorted by relevance
395 uint64_t irqs = riscv_cpu_all_pending(env) & ~env->mideleg & in riscv_cpu_mirq_pending()404 uint64_t irqs = riscv_cpu_all_pending(env) & env->mideleg & in riscv_cpu_sirq_pending()406 uint64_t irqs_f = env->mvip & env->mvien & ~env->mideleg & env->sie; in riscv_cpu_sirq_pending()414 uint64_t irqs = riscv_cpu_all_pending(env) & env->mideleg & env->hideleg; in riscv_cpu_vsirq_pending()451 irqs = pending & ~env->mideleg & -mie; in riscv_cpu_local_irq_pending()458 irqs_f = env->mvip & (env->mvien & ~env->mideleg) & env->sie; in riscv_cpu_local_irq_pending()461 irqs = ((pending & env->mideleg & ~env->hideleg) | irqs_f) & -hsie; in riscv_cpu_local_irq_pending()471 irq_delegated = pending & env->mideleg & env->hideleg; in riscv_cpu_local_irq_pending()1646 uint64_t deleg = async ? env->mideleg : env->medeleg; in riscv_cpu_do_interrupt()
1495 *ret_val = env->mideleg; in rmw_mideleg64()1498 env->mideleg = (env->mideleg & ~mask) | (new_val & mask); in rmw_mideleg64()1501 env->mideleg |= HS_MODE_INTERRUPTS; in rmw_mideleg64()2479 (env->mideleg | ~env->mvien)) | MIP_STIP; in rmw_mvip64()2481 (~env->mideleg & env->mvien); in rmw_mvip64()2496 alias_mask &= (env->mideleg | env->mvien); in rmw_mvip64()2497 nalias_mask &= (env->mideleg | env->mvien); in rmw_mvip64()2693 (~env->mideleg & env->mvien); in rmw_sie64()2694 uint64_t alias_mask = (S_MODE_INTERRUPTS | LOCAL_INTERRUPTS) & env->mideleg; in rmw_sie64()2935 uint64_t mask = (env->mideleg | env->mvien) & sip_writable_mask; in rmw_sip64()[all …]
388 VMSTATE_UINT64(env.mideleg, RISCVCPU),
213 uint64_t mideleg; member
715 env->mideleg = MIP_VSSIP | MIP_VSTIP | MIP_VSEIP | MIP_SGEIP; in tcg_cpu_realize()