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Searched refs:mhpmevent_val (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dpmu.c154 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_MINH)) || in riscv_pmu_incr_ctr_rv64()
156 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_VSINH)) || in riscv_pmu_incr_ctr_rv64()
158 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_VUINH)) || in riscv_pmu_incr_ctr_rv64()
160 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_SINH)) || in riscv_pmu_incr_ctr_rv64()
162 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_UINH))) { in riscv_pmu_incr_ctr_rv64()
170 if (!(env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_OF)) { in riscv_pmu_incr_ctr_rv64()
171 env->mhpmevent_val[ctr_idx] |= MHPMEVENT_BIT_OF; in riscv_pmu_incr_ctr_rv64()
425 target_ulong mhpmevent_val; in pmu_hpmevent_is_of_set() local
429 mhpmevent_val = env->mhpmeventh_val[ctr_idx]; in pmu_hpmevent_is_of_set()
432 mhpmevent_val = env->mhpmevent_val[ctr_idx]; in pmu_hpmevent_is_of_set()
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H A Dmachine.c440 VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),
H A Dcpu.h400 target_ulong mhpmevent_val[RV_MAX_MHPMEVENTS]; member
H A Dcsr.c972 *val = env->mhpmevent_val[evt_index]; in read_mhpmevent()
985 env->mhpmevent_val[evt_index] = val; in write_mhpmevent()
997 env->mhpmevent_val[evt_index] = mhpmevt_val; in write_mhpmevent()
1020 uint64_t mhpmevt_val = env->mhpmevent_val[evt_index]; in write_mhpmeventh()
1060 env->mhpmevent_val[counter_idx]; in riscv_pmu_ctr_get_fixed_counters_val()
1238 mhpm_evt_val = env->mhpmevent_val; in read_scountovf()