| /openbmc/linux/arch/arm64/kvm/ |
| H A D | debug.c | 44 vcpu->arch.guest_debug_preserved.mdscr_el1 = val; in save_guest_debug_regs()
47 vcpu->arch.guest_debug_preserved.mdscr_el1); in save_guest_debug_regs()
55 u64 val = vcpu->arch.guest_debug_preserved.mdscr_el1; in restore_guest_debug_regs()
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| /openbmc/linux/tools/testing/selftests/kvm/aarch64/ |
| H A D | debug-exceptions.c | 114 write_sysreg(0, mdscr_el1); in GEN_DEBUG_WRITE_REG()
147 mdscr = read_sysreg(mdscr_el1) | MDSCR_KDE | MDSCR_MDE; in enable_monitor_debug_exceptions()
148 write_sysreg(mdscr, mdscr_el1); in enable_monitor_debug_exceptions()
230 mdscr = read_sysreg(mdscr_el1) | MDSCR_KDE | MDSCR_SS; in install_ss()
231 write_sysreg(mdscr, mdscr_el1); in install_ss()
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| /openbmc/qemu/target/arm/ |
| H A D | debug_helper.c | 87 return extract32(env->cp15.mdscr_el1, 13, 1) in aa64_generate_debug_exceptions()
167 return extract32(env->cp15.mdscr_el1, 0, 1) in arm_singlestep_active()
364 if (extract32(env->cp15.mdscr_el1, 15, 1) == 0 in check_watchpoints()
388 if (extract32(env->cp15.mdscr_el1, 15, 1) == 0 in arm_debug_check_breakpoint()
869 bool mdscr_el1_tdcc = extract32(env->cp15.mdscr_el1, 12, 1); in access_tdcc()
964 .fieldoffset = offsetof(CPUARMState, cp15.mdscr_el1),
1012 .fieldoffset = offsetof(CPUARMState, cp15.mdscr_el1), },
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| H A D | cpu.h | 475 uint64_t mdscr_el1; member
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| H A D | cpu.c | 325 env->cp15.mdscr_el1 |= 1 << 12; in arm_cpu_reset_hold()
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| H A D | helper.c | 11292 env->cp15.mdscr_el1 = deposit64(env->cp15.mdscr_el1, 2, 4, moe); in arm_cpu_do_interrupt_aarch32()
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| /openbmc/linux/arch/arm64/mm/ |
| H A D | proc.S | 89 mrs x9, mdscr_el1
146 msr mdscr_el1, x10
411 msr mdscr_el1, x1 // access to the DCC from EL0
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | assembler.h | 63 mrs \tmp, mdscr_el1
65 msr mdscr_el1, \tmp
73 mrs \tmp, mdscr_el1
75 msr mdscr_el1, \tmp
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| H A D | kvm_host.h | 564 u32 mdscr_el1; member
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| /openbmc/linux/arch/arm64/kvm/hyp/include/hyp/ |
| H A D | sysreg-sr.h | 21 ctxt_sys_reg(ctxt, MDSCR_EL1) = read_sysreg(mdscr_el1); in __sysreg_save_common_state()
91 write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1); in __sysreg_restore_common_state()
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| /openbmc/linux/arch/arm64/kernel/ |
| H A D | debug-monitors.c | 41 write_sysreg(mdscr, mdscr_el1); in mdscr_write()
48 return read_sysreg(mdscr_el1); in mdscr_read()
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| H A D | entry-common.c | 322 reg = read_sysreg(mdscr_el1); in cortex_a76_erratum_1463225_svc_handler()
324 write_sysreg(val, mdscr_el1); in cortex_a76_erratum_1463225_svc_handler()
330 write_sysreg(reg, mdscr_el1); in cortex_a76_erratum_1463225_svc_handler()
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| /openbmc/qemu/target/arm/hvf/ |
| H A D | hvf.c | 1657 env->cp15.mdscr_el1 = val; in hvf_sysreg_write()
2300 env->cp15.mdscr_el1 = in hvf_arch_update_guest_debug()
2301 deposit64(env->cp15.mdscr_el1, MDSCR_EL1_SS_SHIFT, 1, 1); in hvf_arch_update_guest_debug()
2304 env->cp15.mdscr_el1 = in hvf_arch_update_guest_debug()
2305 deposit64(env->cp15.mdscr_el1, MDSCR_EL1_SS_SHIFT, 1, 0); in hvf_arch_update_guest_debug()
2310 env->cp15.mdscr_el1 = in hvf_arch_update_guest_debug()
2311 deposit64(env->cp15.mdscr_el1, MDSCR_EL1_MDE_SHIFT, 1, 1); in hvf_arch_update_guest_debug()
2313 env->cp15.mdscr_el1 = in hvf_arch_update_guest_debug()
2314 deposit64(env->cp15.mdscr_el1, MDSCR_EL1_MDE_SHIFT, 1, 0); in hvf_arch_update_guest_debug()
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