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Searched refs:mdcr_el3 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/arm/
H A Ddebug_helper.c76 && extract32(env->cp15.mdcr_el3, 16, 1)) { in aa64_generate_debug_exceptions()
115 spd = extract32(env->cp15.mdcr_el3, 14, 2); in aa32_generate_debug_exceptions()
799 if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDOSA)) { in access_tdosa()
820 if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDA)) { in access_tdra()
841 if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDA)) { in access_tda()
865 (env->cp15.mdcr_el3 & MDCR_TDCC); in access_tdcc()
873 if (el < 3 && ((env->cp15.mdcr_el3 & MDCR_TDA) || mdcr_el3_tdcc)) { in access_tdcc()
H A Dhelper.c316 if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TPM)) { in access_tpm()
1086 if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TPM)) { in pmreg_access()
1200 prohibited = prohibited || !(env->cp15.mdcr_el3 & MDCR_SPME); in pmu_counter_enabled()
1212 prohibited = prohibited || (env->cp15.mdcr_el3 & MDCR_SCCD); in pmu_counter_enabled()
5299 bool pmu_op = (env->cp15.mdcr_el3 ^ value) & MDCR_EL3_PMU_ENABLE_BITS; in mdcr_el3_write()
5304 env->cp15.mdcr_el3 = value; in mdcr_el3_write()
5749 .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el3) },
5754 .fieldoffset = offsetoflow32(CPUARMState, cp15.mdcr_el3) },
H A Dcpu.h506 uint64_t mdcr_el3; member