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Searched refs:mcs_reg_read (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmcs.c38 stats->ctl_octet_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats()
82 stats->ctl_octet_cnt = mcs_reg_read(mcs, reg); in mcs_get_rx_secy_stats()
112 stats->pkt_nosa_cnt = mcs_reg_read(mcs, reg); in mcs_get_rx_secy_stats()
124 stats->pkt_ctl_cnt = mcs_reg_read(mcs, reg); in mcs_get_rx_secy_stats()
187 stats->pkt_ok_cnt = mcs_reg_read(mcs, reg); in mcs_get_sa_stats()
207 stats->hit_cnt = mcs_reg_read(mcs, reg); in mcs_get_sc_stats()
597 dis = mcs_reg_read(mcs, reg); in mcs_free_ctrlpktrule()
605 dis = mcs_reg_read(mcs, reg); in mcs_free_ctrlpktrule()
693 enb = mcs_reg_read(mcs, reg); in mcs_ctrlpktrule_write()
954 val = mcs_reg_read(mcs, reg); in cn10kb_mcs_bbe_intr_handler()
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H A Dmcs_cnf10kb.c100 val = mcs_reg_read(mcs, reg); in cnf10kb_mcs_tx_sa_mem_map_write()
130 val = mcs_reg_read(mcs, MCSX_MIL_GLOBAL); in mcs_set_force_clk_en()
137 while (!(mcs_reg_read(mcs, MCSX_MIL_IP_GBL_STATUS) & BIT_ULL(0))) { in mcs_set_force_clk_en()
169 rekey_ena = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_AUTO_REKEY_ENABLE_0); in cnf10kb_mcs_tx_pn_thresh_reached_handler()
175 sa_status = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_TX_SA_ACTIVEX(sc)); in cnf10kb_mcs_tx_pn_thresh_reached_handler()
181 val = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_SA_MAP_MEM_0X(sc)); in cnf10kb_mcs_tx_pn_thresh_reached_handler()
205 val = mcs_reg_read(mcs, MCSX_CPM_TX_SLAVE_SA_MAP_MEM_0X(sc)); in cnf10kb_mcs_tx_pn_wrapped_handler()
H A Dmcs.h172 static inline u64 mcs_reg_read(struct mcs *mcs, u64 offset) in mcs_reg_read() function
H A Dmcs_rvu_if.c53 cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PEX_CONFIGURATION); in rvu_mcs_ptp_cfg()
64 cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PORT_CFGX(port)); in rvu_mcs_ptp_cfg()