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Searched refs:max_read_sample_delay (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c1087 u32 min_read_sample_delay, max_read_sample_delay, max_rl_phase; in ddr3_odt_read_dynamic_config() local
1096 &max_read_sample_delay, &cs_max); in ddr3_odt_read_dynamic_config()
1109 reg |= (((max_read_sample_delay + 4 + (((max_rl_phase + 1) / 2) + 1)) & in ddr3_odt_read_dynamic_config()