| /openbmc/linux/drivers/clk/mmp/ |
| H A D | clk-frac.c | 54 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
61 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
64 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
131 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_init()
134 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_init()
141 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_init()
145 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_init()
[all …]
|
| /openbmc/linux/drivers/clk/spear/ |
| H A D | clk-aux-synth.c | 77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
116 aux->masks->xscale_sel_shift; in clk_aux_set_rate()
117 val &= ~(aux->masks->yscale_sel_mask << aux->masks->yscale_sel_shift); in clk_aux_set_rate()
119 aux->masks->yscale_sel_shift; in clk_aux_set_rate()
153 if (!masks) in clk_register_aux()
[all …]
|
| /openbmc/linux/lib/ |
| H A D | group_cpus.c | 51 if (!masks) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
64 kfree(masks); in alloc_node_to_cpumask()
74 kfree(masks); in free_node_to_cpumask()
273 cpumask_or(&masks[curgrp], &masks[curgrp], nmsk); in __group_cpus_evenly()
365 masks = kcalloc(numgrps, sizeof(*masks), GFP_KERNEL); in group_cpus_evenly()
366 if (!masks) in group_cpus_evenly()
421 kfree(masks); in group_cpus_evenly()
424 return masks; in group_cpus_evenly()
431 if (!masks) in group_cpus_evenly()
[all …]
|
| /openbmc/linux/kernel/irq/ |
| H A D | affinity.c | 29 struct irq_affinity_desc *masks = NULL; in irq_create_affinity_masks() local
59 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in irq_create_affinity_masks()
60 if (!masks) in irq_create_affinity_masks()
65 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
77 kfree(masks); in irq_create_affinity_masks()
82 cpumask_copy(&masks[curvec + j].mask, &result[j]); in irq_create_affinity_masks()
95 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
99 masks[i].is_managed = 1; in irq_create_affinity_masks()
101 return masks; in irq_create_affinity_masks()
|
| /openbmc/phosphor-power/phosphor-regulators/src/actions/ |
| H A D | i2c_write_bytes_action.hpp | 61 reg{reg}, values{values}, masks{} in I2CWriteBytesAction()
87 const std::vector<uint8_t>& masks) : in I2CWriteBytesAction() argument
88 reg{reg}, values{values}, masks{masks} in I2CWriteBytesAction()
97 if (masks.size() != values.size())
152 return masks; in getMasks()
179 const std::vector<uint8_t> masks{}; member in phosphor::power::regulators::I2CWriteBytesAction
|
| H A D | i2c_compare_bytes_action.hpp | 83 const std::vector<uint8_t>& masks) : in I2CCompareBytesAction() argument
84 reg{reg}, values{values}, masks{masks} in I2CCompareBytesAction()
93 if (masks.size() != values.size())
151 return masks; in getMasks()
178 const std::vector<uint8_t> masks{}; member in phosphor::power::regulators::I2CCompareBytesAction
|
| H A D | i2c_write_bytes_action.cpp | 35 if (masks.size() == 0) in execute()
54 valuesToWrite[i] = (values[i] & masks[i]) | in execute()
55 (currentValues[i] & (~masks[i])); in execute()
82 for (unsigned int i = 0; i < masks.size(); ++i) in toString()
84 ss << ((i > 0) ? ", " : "") << "0x" << static_cast<uint16_t>(masks[i]); in toString()
|
| H A D | i2c_compare_bytes_action.cpp | 44 if ((actualValues[i] & masks[i]) != values[i]) in execute()
70 for (unsigned int i = 0; i < masks.size(); ++i) in toString()
72 ss << ((i > 0) ? ", " : "") << "0x" << static_cast<uint16_t>(masks[i]); in toString()
|
| /openbmc/linux/drivers/net/dsa/microchip/ |
| H A D | ksz8795.c | 165 const u32 *masks; in ksz8_r_mib_cnt() local
172 masks = dev->info->masks; in ksz8_r_mib_cnt()
208 masks = dev->info->masks; in ksz8795_r_mib_pkt()
389 masks = dev->info->masks; in ksz8_valid_dyn_entry()
423 masks = dev->info->masks; in ksz8_r_dyn_mac_table()
484 masks = dev->info->masks; in ksz8_r_sta_mac_table()
535 masks = dev->info->masks; in ksz8_w_sta_mac_table()
566 masks = dev->info->masks; in ksz8_from_vlan()
581 masks = dev->info->masks; in ksz8_to_vlan()
1296 masks = dev->info->masks; in ksz8_port_setup()
[all …]
|
| /openbmc/phosphor-power/phosphor-regulators/test/actions/ |
| H A D | i2c_compare_bytes_action_tests.cpp | 96 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
118 std::vector<uint8_t> masks{}; in TEST() local
135 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
178 const std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
246 const std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
314 std::vector<uint8_t> masks{0x7E}; in TEST() local
411 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
412 I2CCompareBytesAction action{0xA0, values, masks}; in TEST()
433 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
444 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
[all …]
|
| H A D | i2c_write_bytes_action_tests.cpp | 96 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
97 I2CWriteBytesAction action{0xA0, values, masks}; in TEST()
118 std::vector<uint8_t> masks{}; in TEST() local
135 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
222 std::vector<uint8_t> masks{0xC3, 0x96}; in TEST() local
266 std::vector<uint8_t> masks{0xC3}; in TEST() local
325 std::vector<uint8_t> masks{0xC3, 0x96}; in TEST() local
429 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
430 I2CWriteBytesAction action{0xA0, values, masks}; in TEST()
448 std::vector<uint8_t> masks{0x7E, 0x3C}; in TEST() local
[all …]
|
| /openbmc/linux/block/ |
| H A D | blk-mq-cpumap.c | 20 const struct cpumask *masks; in blk_mq_map_queues() local
23 masks = group_cpus_evenly(qmap->nr_queues); in blk_mq_map_queues()
24 if (!masks) { in blk_mq_map_queues()
31 for_each_cpu(cpu, &masks[queue]) in blk_mq_map_queues()
34 kfree(masks); in blk_mq_map_queues()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dpp_cm.c | 119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
214 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
216 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
270 reg->masks.field_region_end = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
274 reg->masks.field_region_end_base = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_BASE_B; in dpp1_cm_get_reg_field()
278 reg->masks.exp_region_start = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_START_B; in dpp1_cm_get_reg_field()
297 reg->masks.field_region_end = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_degamma_reg_field()
305 reg->masks.exp_region_start = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_START_B; in dpp1_cm_get_degamma_reg_field()
470 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_ICSC_C11; in dpp1_program_input_csc()
[all …]
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_i2c_hw.c | 86 else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE) in get_channel_status()
622 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
629 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
645 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
652 masks); in dce100_i2c_hw_construct()
662 const struct dce_i2c_mask *masks) in dce112_i2c_hw_construct() argument
669 masks); in dce112_i2c_hw_construct()
679 const struct dce_i2c_mask *masks) in dcn1_i2c_hw_construct() argument
686 masks); in dcn1_i2c_hw_construct()
696 const struct dce_i2c_mask *masks) in dcn2_i2c_hw_construct() argument
[all …]
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb_cm.c | 53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
75 reg->masks.exp_region_start = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_B; in dwb3_get_reg_field_ogam()
316 gam_regs.masks.csc_c11 = dwbc30->dwbc_mask->DWB_GAMUT_REMAPA_C11; in dwb3_program_gamut_remap()
[all …]
|
| H A D | dcn30_dpp_cm.c | 177 reg->masks.field_region_start_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_BASE_B; in dpp3_gamcor_reg_field()
179 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
182 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
184 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
186 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
191 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
193 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
195 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
199 reg->masks.exp_region_start = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_B; in dpp3_gamcor_reg_field()
345 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
[all …]
|
| /openbmc/linux/drivers/clk/uniphier/ |
| H A D | clk-uniphier-mux.c | 17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
|
| /openbmc/linux/drivers/virtio/ |
| H A D | virtio_vdpa.c | 306 struct cpumask *masks = NULL; in create_affinity_masks() local
319 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in create_affinity_masks()
320 if (!masks) in create_affinity_masks()
325 cpumask_setall(&masks[curvec]); in create_affinity_masks()
333 kfree(masks); in create_affinity_masks()
351 cpumask_setall(&masks[curvec]); in create_affinity_masks()
353 return masks; in create_affinity_masks()
367 struct cpumask *masks; in virtio_vdpa_find_vqs() local
374 if (!masks) in virtio_vdpa_find_vqs()
400 kfree(masks); in virtio_vdpa_find_vqs()
[all …]
|
| /openbmc/linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_flex_pipe.c | 1176 if (hw->blk[blk].masks.masks[i].in_use && in ice_prof_has_mask_idx()
1479 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks)); in ice_init_prof_masks()
1520 if (hw->blk[blk].masks.masks[i].in_use) { in ice_alloc_prof_mask()
1550 hw->blk[blk].masks.masks[i].mask = mask; in ice_alloc_prof_mask()
1551 hw->blk[blk].masks.masks[i].idx = idx; in ice_alloc_prof_mask()
1552 hw->blk[blk].masks.masks[i].ref = 0; in ice_alloc_prof_mask()
1556 hw->blk[blk].masks.masks[i].ref++; in ice_alloc_prof_mask()
1588 hw->blk[blk].masks.masks[mask_idx].ref--; in ice_free_prof_mask()
1649 hw->blk[blk].masks.masks[i].idx = 0; in ice_shutdown_prof_masks()
1650 hw->blk[blk].masks.masks[i].mask = 0; in ice_shutdown_prof_masks()
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | brcm,usb-pinmap.yaml | 33 brcm,in-masks:
45 brcm,out-masks:
47 description: Array of enable, value, changed and clear masks, one
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
|
| /openbmc/qemu/include/hw/s390x/ |
| H A D | event-facility.h | 57 uint8_t masks[]; member
68 #define WEM_CP_RECEIVE_MASK(wem, mask_len) ((wem)->masks)
69 #define WEM_CP_SEND_MASK(wem, mask_len) ((wem)->masks + (mask_len))
70 #define WEM_RECEIVE_MASK(wem, mask_len) ((wem)->masks + 2 * (mask_len))
71 #define WEM_SEND_MASK(wem, mask_len) ((wem)->masks + 3 * (mask_len))
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_mpc.c | 165 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_output_csc()
167 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_output_csc()
223 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
225 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
251 reg->masks.exp_region0_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
253 reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
255 reg->masks.exp_region1_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
259 reg->masks.field_region_end = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
261 reg->masks.field_region_end_slope = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
263 reg->masks.field_region_end_base = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_BASE_B; in mpc2_ogam_get_reg_field()
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | tdm-slot.txt | 20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
|
| /openbmc/linux/drivers/s390/char/ |
| H A D | sclp.h | 98 u8 masks[4 * 1021]; /* variable length */ member
109 static inline sccb_mask_t sccb_get_mask(u8 *masks, size_t len, int i) in sccb_get_mask() argument
113 memcpy(&res, masks + i * len, min(sizeof(res), len)); in sccb_get_mask()
117 static inline void sccb_set_mask(u8 *masks, size_t len, int i, sccb_mask_t val) in sccb_set_mask() argument
119 memset(masks + i * len, 0, len); in sccb_set_mask()
120 memcpy(masks + i * len, &val, min(sizeof(val), len)); in sccb_set_mask()
127 sccb_get_mask(__sccb->masks, __sccb->mask_length, i); \
138 sccb_set_mask(__sccb->masks, __sccb->mask_length, i, val); \
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_hubbub.c | 38 hubbub1->shifts->field_name, hubbub1->masks->field_name
48 hubbub1->shifts->field_name, hubbub1->masks->field_name
79 hubbub3->masks = hubbub_mask; in hubbub301_construct()
|