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Searched refs:maer0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun50i_h6.h31 u32 maer0; /* 0x020 master enable register 0 */ member
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun50i_h6.c323 writel(0, &mctl_com->maer0); in mctl_sys_init()
673 writel(0xffffffff, &mctl_com->maer0); in mctl_channel_init()