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Searched refs:mac_reg (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/net/
H A De1000.c90 uint32_t mac_reg[0x8000]; member
159 e1000x_update_regs_on_link_up(s->mac_reg, s->phy_reg); in DECLARE_OBJ_CHECKERS()
168 e1000x_update_regs_on_autoneg_done(s->mac_reg, s->phy_reg); in e1000_autoneg_done()
194 e1000x_restart_autoneg(s->mac_reg, s->phy_reg, s->autoneg_timer); in set_phy_ctrl()
279 s->mac_reg[ICR] = val; in set_interrupt_cause()
289 s->mac_reg[ICS] = val; in set_interrupt_cause()
291 pending_ints = (s->mac_reg[IMS] & s->mac_reg[ICR]); in set_interrupt_cause()
314 mit_update_delay(&mit_delay, s->mac_reg[TADV] * 4); in set_interrupt_cause()
316 if (s->mac_reg[RDTR] && (pending_ints & E1000_ICS_RXT0)) { in set_interrupt_cause()
317 mit_update_delay(&mit_delay, s->mac_reg[RADV] * 4); in set_interrupt_cause()
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/openbmc/u-boot/drivers/net/
H A Dsun8i_emac.c134 void *mac_reg; member
172 writel(miiaddr, priv->mac_reg + EMAC_MII_CMD); in sun8i_mdio_read()
176 if (!(readl(priv->mac_reg + EMAC_MII_CMD) & MDIO_CMD_MII_BUSY)) in sun8i_mdio_read()
177 return readl(priv->mac_reg + EMAC_MII_DATA); in sun8i_mdio_read()
204 writel(val, priv->mac_reg + EMAC_MII_DATA); in sun8i_mdio_write()
205 writel(miiaddr, priv->mac_reg + EMAC_MII_CMD); in sun8i_mdio_write()
209 if (!(readl(priv->mac_reg + EMAC_MII_CMD) & in sun8i_mdio_write()
228 writel(macid_hi, priv->mac_reg + EMAC_ADDR0_HIGH); in _sun8i_write_hwaddr()
229 writel(macid_lo, priv->mac_reg + EMAC_ADDR0_LOW); in _sun8i_write_hwaddr()
239 v = readl(priv->mac_reg + EMAC_CTL0); in sun8i_adjust_link()
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