Home
last modified time | relevance | path

Searched refs:lut0 (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dpp_cm.c1067 struct dc_rgb *lut0; in dpp20_program_3dlut() local
1088 lut0 = params->tetrahedral_17.lut0; in dpp20_program_3dlut()
1092 lut_size0 = sizeof(params->tetrahedral_17.lut0)/ in dpp20_program_3dlut()
1093 sizeof(params->tetrahedral_17.lut0[0]); in dpp20_program_3dlut()
1097 lut0 = params->tetrahedral_9.lut0; in dpp20_program_3dlut()
1101 lut_size0 = sizeof(params->tetrahedral_9.lut0)/ in dpp20_program_3dlut()
1102 sizeof(params->tetrahedral_9.lut0[0]); in dpp20_program_3dlut()
1111 dpp20_set3dlut_ram12(dpp_base, lut0, lut_size0); in dpp20_program_3dlut()
1113 dpp20_set3dlut_ram10(dpp_base, lut0, lut_size0); in dpp20_program_3dlut()
H A Ddcn20_dpp.c219 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp2_cnv_setup()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_mpc.c908 const struct dc_rgb *lut0; in mpc32_program_3dlut() local
931 lut0 = params->tetrahedral_17.lut0; in mpc32_program_3dlut()
935 lut_size0 = sizeof(params->tetrahedral_17.lut0)/ in mpc32_program_3dlut()
936 sizeof(params->tetrahedral_17.lut0[0]); in mpc32_program_3dlut()
940 lut0 = params->tetrahedral_9.lut0; in mpc32_program_3dlut()
944 lut_size0 = sizeof(params->tetrahedral_9.lut0)/ in mpc32_program_3dlut()
945 sizeof(params->tetrahedral_9.lut0[0]); in mpc32_program_3dlut()
954 mpc32_set3dlut_ram12(mpc, lut0, lut_size0, mpcc_id); in mpc32_program_3dlut()
956 mpc32_set3dlut_ram10(mpc, lut0, lut_size0, mpcc_id); in mpc32_program_3dlut()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dhw_shared.h99 struct dc_rgb lut0[1229]; member
105 struct dc_rgb lut0[183]; member
H A Ddpp.h132 int lut0; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dpp.c301 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp3_cnv_setup()
1356 struct dc_rgb *lut0; in dpp3_program_3dlut() local
1383 lut0 = params->tetrahedral_17.lut0; in dpp3_program_3dlut()
1387 lut_size0 = sizeof(params->tetrahedral_17.lut0)/ in dpp3_program_3dlut()
1388 sizeof(params->tetrahedral_17.lut0[0]); in dpp3_program_3dlut()
1392 lut0 = params->tetrahedral_9.lut0; in dpp3_program_3dlut()
1396 lut_size0 = sizeof(params->tetrahedral_9.lut0)/ in dpp3_program_3dlut()
1397 sizeof(params->tetrahedral_9.lut0[0]); in dpp3_program_3dlut()
1406 dpp3_set3dlut_ram12(dpp_base, lut0, lut_size0); in dpp3_program_3dlut()
1408 dpp3_set3dlut_ram10(dpp_base, lut0, lut_size0); in dpp3_program_3dlut()
H A Ddcn30_mpc.c1157 const struct dc_rgb *lut0; in mpc3_program_3dlut() local
1180 lut0 = params->tetrahedral_17.lut0; in mpc3_program_3dlut()
1184 lut_size0 = sizeof(params->tetrahedral_17.lut0)/ in mpc3_program_3dlut()
1185 sizeof(params->tetrahedral_17.lut0[0]); in mpc3_program_3dlut()
1189 lut0 = params->tetrahedral_9.lut0; in mpc3_program_3dlut()
1193 lut_size0 = sizeof(params->tetrahedral_9.lut0)/ in mpc3_program_3dlut()
1194 sizeof(params->tetrahedral_9.lut0[0]); in mpc3_program_3dlut()
1203 mpc3_set3dlut_ram12(mpc, lut0, lut_size0, rmu_idx); in mpc3_program_3dlut()
1205 mpc3_set3dlut_ram10(mpc, lut0, lut_size0, rmu_idx); in mpc3_program_3dlut()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_dpp.c160 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp201_cnv_setup()
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc76613 { "lut0", ICLASS_iclass_LUT0,