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Searched refs:lsl (Results 1 – 25 of 143) sorted by relevance

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/openbmc/u-boot/arch/arm/include/asm/
H A Dassembler.h25 #define lspush lsl
26 #define get_byte_0 lsl #0
30 #define put_byte_0 lsl #0
31 #define put_byte_1 lsl #8
32 #define put_byte_2 lsl #16
33 #define put_byte_3 lsl #24
35 #define lspull lsl
40 #define get_byte_3 lsl #0
41 #define put_byte_0 lsl #24
42 #define put_byte_1 lsl #16
[all …]
/openbmc/linux/arch/arm/lib/
H A Dio-writesw-armv3.S25 orr r3, r3, r3, lsl #16
43 mov ip, r3, lsl #16
48 orr ip, ip, ip, lsl #16
51 mov ip, r4, lsl #16
56 orr ip, ip, ip, lsl #16
59 mov ip, r5, lsl #16
64 orr ip, ip, ip, lsl #16
67 mov ip, r6, lsl #16
72 orr ip, ip, ip, lsl #16
86 mov ip, r3, lsl #16
[all …]
H A Dbitops.h14 add r1, r1, r0, lsl #2 @ Get word offset
20 mov r3, r2, lsl r3
39 add r1, r1, r0, lsl #2 @ Get word offset
40 mov r3, r2, lsl r3 @ create mask
77 mov r3, r3, lsl r2
79 ldr r2, [r1, r0, lsl #2]
81 str r2, [r1, r0, lsl #2]
104 ldr r2, [r1, r0, lsl #2]!
106 tst r2, r0, lsl r3
107 \instr r2, r2, r0, lsl r3
H A Dio-readsw-armv3.S36 orr ip, ip, ip, lsl #8
45 orr r3, r3, r4, lsl #16
50 orr r4, r4, r5, lsl #16
55 orr r5, r5, r6, lsl #16
60 orr r6, r6, lr, lsl #16
76 orr r3, r3, r4, lsl #16
81 orr r4, r4, r5, lsl #16
91 orr r3, r3, r4, lsl #16
H A Dio-readsw-armv4.S12 orr \rd, \hw1, \hw2, lsl #16
14 orr \rd, \hw2, \hw1, lsl #16
18 .Linsw_align: movs ip, r1, lsl #31
68 .Lno_insw_4: movs r2, r2, lsl #31
85 #define pull_hbyte1 lsl #24
89 #define push_hbyte0 lsl #24
106 _BE_ONLY_( mov ip, ip, lsl #24 )
111 orr ip, ip, r3, lsl #8
H A Ddiv64.S69 mov ip, ip, lsl yl
70 mov yl, r4, lsl yl
78 movcc yl, yl, lsl #1
79 movcc ip, ip, lsl #1
104 4: movs xl, xl, lsl #1
127 mov xl, xl, lsl xh
132 7: movs xl, xl, lsl #1
180 ARM( orr yl, yl, xh, lsl ip )
181 THUMB( lsl xh, xh, ip )
183 mov xh, xl, lsl ip
H A Dmuldi3.S32 bic xl, xl, ip, lsl #16
33 bic yl, yl, yh, lsl #16
38 adds xl, xl, yh, lsl #16
40 adds xl, xl, ip, lsl #16
H A Dashldi3.S45 movmi ah, ah, lsl r2
46 movpl ah, al, lsl r3
50 mov al, al, lsl r2
H A Dio-writesw-armv4.S22 .Loutsw_align: movs ip, r1, lsl #31
55 .Lno_outsw_4: movs r2, r2, lsl #31
67 #define pull_hbyte0 lsl #8
71 #define push_hbyte1 lsl #8
/openbmc/linux/drivers/scsi/arm/
H A Dacornscsi-io.S31 orr r3, r3, r4, lsl #16
33 orr r4, r4, r6, lsl #16
36 orr r5, r5, r6, lsl #16
38 orr r6, r6, ip, lsl #16
47 orr r3, r3, r4, lsl #16
49 orr r4, r4, r6, lsl #16
58 orr r3, r3, r4, lsl #16
82 mov r3, r4, lsl #16
85 orr r4, r4, r4, lsl #16
86 mov r5, r6, lsl #16
[all …]
/openbmc/u-boot/arch/arm/lib/
H A Duldivmod.S73 movmi B_1, B_1, lsl D_0
77 movpl B_1, B_0, lsl D_1
78 mov B_0, B_0, lsl D_0
80 movmi C_1, C_1, lsl D_0
84 movpl C_1, C_0, lsl D_1
85 mov C_0, C_0, lsl D_0
102 mov B_1, B_1, lsl #4
104 mov B_0, B_0, lsl #4
106 mov C_1, C_1, lsl #4
108 mov C_0, C_0, lsl #4
[all …]
H A Ddiv64.S72 mov ip, ip, lsl yl
73 mov yl, r4, lsl yl
81 movcc yl, yl, lsl #1
82 movcc ip, ip, lsl #1
107 4: movs xl, xl, lsl #1
130 mov xl, xl, lsl xh
135 7: movs xl, xl, lsl #1
183 ARM( orr yl, yl, xh, lsl ip )
184 THUMB( lsl xh, xh, ip )
186 mov xh, xl, lsl ip
H A Dmuldi3.S33 bic xl, xl, ip, lsl #16
34 bic yl, yl, yh, lsl #16
39 adds xl, xl, yh, lsl #16
41 adds xl, xl, ip, lsl #16
H A Dashldi3.S23 movmi ah, ah, lsl r2
24 movpl ah, al, lsl r3
28 mov al, al, lsl r2
/openbmc/linux/arch/arm/boot/compressed/
H A Dll_char_wr.S40 mov r1, r1, lsl #3
56 add r0, r0, r5, lsl #3 @ Move to bottom of character
65 ldr r7, [lr, r7, lsl #2]
70 ldr r7, [lr, r7, lsl #2]
84 ldr ip, [lr, ip, lsl #2]
87 ldr ip, [lr, ip, lsl #2] @ avoid r4
94 ldr ip, [lr, ip, lsl #2]
97 ldr ip, [lr, ip, lsl #2] @ avoid r4
/openbmc/linux/arch/arm64/lib/
H A Dstrncmp.S54 #define LS_FW lsl
58 #define LS_BK lsl
99 lsl data1, data1, pos
101 lsl data2, data2, pos
114 lsl limit, tmp1, #3 /* Bits -> bytes. */
149 lsl data1, data1, pos
150 lsl data2, data2, pos
167 neg tmp3, count, lsl #3 /* 64 - bits(bytes beyond align). */
233 lsl offset, src2, #3
301 cmp pos, limit, lsl #3
H A Dtishift.S16 lsl x1, x1, x2
18 lsl x2, x0, x2
26 lsl x1, x0, x1
39 lsl x3, x1, x3
61 lsl x3, x1, x3
H A Dstrcmp.S44 # define LS_FW lsl
97 lsl data1, data1, shift
98 lsl data2, data2, shift
114 neg shift, src2, lsl 3 /* Bits to alignment -64. */
135 neg shift, src2, lsl 3
165 lsl tmp, has_nul, shift
/openbmc/linux/arch/arm/mm/
H A Dabort-lv4t.S68 and r9, r8, r7, lsl #1
70 and r9, r8, r7, lsl #2
72 and r9, r8, r7, lsl #3
80 subne r7, r7, r6, lsl #2 @ Undo increment
81 addeq r7, r7, r6, lsl #2 @ Undo decrement
95 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
110 movs r6, r8, lsl #20 @ Get offset
127 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
136 mov r6, r6, lsl r9 @ 0: LSL #!0
216 addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
[all …]
H A Dtlb-v7.S45 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
46 mov r1, r1, lsl #PAGE_SHIFT
74 mov r0, r0, lsl #PAGE_SHIFT
75 mov r1, r1, lsl #PAGE_SHIFT
/openbmc/linux/arch/arm/kernel/
H A Dphys2virt.S42 teq r3, r0, lsl #21 @ must be 2 MiB aligned
64 @ lsl <reg>, #21
68 @ lsl <reg>, #21
72 @ lsl <reg>, #21
144 @ phys-to-virt: sub <VA>, <PA>, #offset<31:24>, lsl #24
145 @ sub <VA>, <PA>, #offset<23:16>, lsl #16
147 @ virt-to-phys (non-LPAE): add <PA>, <VA>, #offset<31:24>, lsl #24
148 @ add <PA>, <VA>, #offset<23:16>, lsl #16
151 @ adds <PAlo>, <VA>, <reg>, lsl #20
195 orreq ip, ip, r6, lsl #4 @ MOVW -> mask in offset bits 31-24
[all …]
/openbmc/linux/arch/m68k/math-emu/
H A Dfp_movem.S157 3: lsl.b #1,%d1
164 lsl.w #1,%d2
165 lsl.l #7,%d2
166 lsl.l #8,%d2
176 4: lsl.b #1,%d1
307 lsl.l #5,%d1
312 3: lsl.b #1,%d1
320 lsl.l #5,%d1
331 3: lsl.b #1,%d1
341 4: lsl.b #1,%d1
/openbmc/u-boot/arch/arm/mach-mvebu/armada8k/
H A Dcache_llc.S19 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
25 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
30 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
/openbmc/u-boot/arch/arm/mach-tegra/tegra186/
H A Dcache.S28 movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16
34 movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16
40 movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dcache.S26 lsl x12, x0, #1
46 lsl x7, x6, x5
48 lsl x7, x4, x2
86 lsl x12, x0, #1
137 lsl x2, x2, x3 /* cache line size */
163 lsl x2, x2, x3 /* cache line size */

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