| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_training_8b_10b.c | 39 const struct dc_link_settings *link_settings) in get_cr_training_aux_rd_interval() argument
45 if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING && in get_cr_training_aux_rd_interval()
60 const struct dc_link_settings *link_settings) in get_eq_training_aux_rd_interval() argument
65 if (link_dp_get_encoding_format(link_settings) == DP_128b_132b_ENCODING) { in get_eq_training_aux_rd_interval()
71 } else if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING && in get_eq_training_aux_rd_interval()
100 lt_settings->link_settings.use_link_rate_set = link_setting->use_link_rate_set; in decide_8b_10b_training_settings()
101 lt_settings->link_settings.link_rate_set = link_setting->link_rate_set; in decide_8b_10b_training_settings()
102 lt_settings->link_settings.link_rate = link_setting->link_rate; in decide_8b_10b_training_settings()
103 lt_settings->link_settings.lane_count = link_setting->lane_count; in decide_8b_10b_training_settings()
111 lt_settings->link_settings.link_spread = link->dp_ss_off ? in decide_8b_10b_training_settings()
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| H A D | link_dp_training.c | 67 switch (lt_settings->link_settings.link_rate) { in dp_log_training_result()
152 switch (lt_settings->link_settings.link_spread) { in dp_log_training_result()
172 lt_settings->link_settings.lane_count, in dp_log_training_result()
313 for (lane = 1; lane < lt_settings->link_settings.lane_count; lane++) { in maximize_lane_settings()
358 if (link_dp_get_encoding_format(<_settings->link_settings) == in dp_hw_to_dpcd_lane_settings()
370 } else if (link_dp_get_encoding_format(<_settings->link_settings) == in dp_hw_to_dpcd_lane_settings()
378 uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings) in get_dpcd_link_rate() argument
381 enum dp_link_encoding encoding = link_dp_get_encoding_format(link_settings); in get_dpcd_link_rate()
384 switch (link_settings->link_rate) { in get_dpcd_link_rate()
399 link_rate = (uint8_t) link_settings->link_rate; in get_dpcd_link_rate()
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| H A D | link_dp_phy.c | 62 const struct dc_link_settings *link_settings) in dp_enable_link_phy() argument
64 link->cur_link_settings = *link_settings; in dp_enable_link_phy()
66 clock_source, link_settings); in dp_enable_link_phy()
98 const struct link_training_settings *link_settings, in dp_set_hw_lane_settings() argument
103 if ((link_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT) && in dp_set_hw_lane_settings()
109 &link_settings->link_settings, in dp_set_hw_lane_settings()
110 link_settings->hw_lane_settings); in dp_set_hw_lane_settings()
113 link_settings->hw_lane_settings, in dp_set_hw_lane_settings()
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| H A D | link_dp_training_fixed_vs_pe_retimer.c | 119 target_rate = get_dpcd_link_rate(<_settings->link_settings); in perform_fixed_vs_pe_nontransparent_training_sequence()
123 lt_settings->link_settings.link_rate = toggle_rate; in perform_fixed_vs_pe_nontransparent_training_sequence()
216 ASSERT(link_dp_get_encoding_format(<_settings->link_settings) == in dp_perform_fixed_vs_pe_training_sequence_legacy()
249 downspread.raw = (uint8_t)(lt_settings->link_settings.link_spread); in dp_perform_fixed_vs_pe_training_sequence_legacy()
252 lt_settings->link_settings.lane_count; in dp_perform_fixed_vs_pe_training_sequence_legacy()
269 rate = get_dpcd_link_rate(<_settings->link_settings); in dp_perform_fixed_vs_pe_training_sequence_legacy()
289 lt_settings->link_settings.link_rate, in dp_perform_fixed_vs_pe_training_sequence_legacy()
291 lt_settings->link_settings.lane_count, in dp_perform_fixed_vs_pe_training_sequence_legacy()
294 lt_settings->link_settings.link_spread); in dp_perform_fixed_vs_pe_training_sequence_legacy()
296 if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) { in dp_perform_fixed_vs_pe_training_sequence_legacy()
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| H A D | link_dp_training_128b_132b.c | 118 } else if (dp_is_ch_eq_done(lt_settings->link_settings.lane_count, in dp_perform_128b_132b_channel_eq_done_sequence()
181 } else if (dp_is_symbol_locked(lt_settings->link_settings.lane_count, dpcd_lane_status) && in dp_perform_128b_132b_cds_done_sequence()
207 <_settings->link_settings, in dp_perform_128b_132b_link_training()
230 const struct dc_link_settings *link_settings, in decide_128b_132b_training_settings() argument
235 lt_settings->link_settings = *link_settings; in decide_128b_132b_training_settings()
237 lt_settings->link_settings.link_spread = link->dp_ss_off ? LINK_SPREAD_DISABLED : in decide_128b_132b_training_settings()
240 lt_settings->pattern_for_cr = decide_cr_training_pattern(link_settings); in decide_128b_132b_training_settings()
241 lt_settings->pattern_for_eq = decide_eq_training_pattern(link, link_settings); in decide_128b_132b_training_settings()
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| H A D | link_dp_training.h | 42 const struct dc_link_settings *link_settings,
107 const struct dc_link_settings *link_settings,
117 const struct dc_link_settings *link_settings);
120 const struct dc_link_settings *link_settings);
152 uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings);
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| H A D | link_dp_phy.h | 35 const struct dc_link_settings *link_settings);
44 const struct link_training_settings *link_settings,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_link_encoder.c | 213 const struct dc_link_settings *link_settings, in update_cfg_data() argument
220 for (i = 0; i < link_settings->lane_count; i++) in update_cfg_data()
223 switch (link_settings->link_rate) { in update_cfg_data()
238 __func__, link_settings->link_rate); in update_cfg_data()
247 const struct dc_link_settings *link_settings, in dcn20_link_encoder_enable_dp_output() argument
255 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn20_link_encoder_enable_dp_output()
259 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn20_link_encoder_enable_dp_output()
262 enc1_configure_encoder(enc10, link_settings); in dcn20_link_encoder_enable_dp_output()
269 struct dc_link_settings *link_settings) in dcn20_link_encoder_get_max_link_cap() argument
274 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn20_link_encoder_get_max_link_cap()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dio_link_encoder.c | 452 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_output() argument
461 dcn20_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn31_link_encoder_enable_dp_output()
470 enc1_configure_encoder(enc10, link_settings); in dcn31_link_encoder_enable_dp_output()
475 dpia_control.lanenum = (uint8_t)link_settings->lane_count; in dcn31_link_encoder_enable_dp_output()
476 dpia_control.symclk_10khz = link_settings->link_rate * in dcn31_link_encoder_enable_dp_output()
499 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_mst_output() argument
508 dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); in dcn31_link_encoder_enable_dp_mst_output()
517 enc1_configure_encoder(enc10, link_settings); in dcn31_link_encoder_enable_dp_mst_output()
522 dpia_control.lanenum = (uint8_t)link_settings->lane_count; in dcn31_link_encoder_enable_dp_mst_output()
523 dpia_control.symclk_10khz = link_settings->link_rate * in dcn31_link_encoder_enable_dp_mst_output()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/virtual/ |
| H A D | virtual_link_encoder.c | 50 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_output() argument
55 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_mst_output() argument
64 const struct dc_link_settings *link_settings, in virtual_link_encoder_dp_set_lane_settings() argument
87 struct dc_link_settings *link_settings) in virtual_link_encoder_get_max_link_cap() argument
92 *link_settings = max_link_cap; in virtual_link_encoder_get_max_link_cap()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.c | 599 const struct dc_link_settings *link_settings) in configure_encoder() argument
604 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in configure_encoder()
613 const struct dc_link_settings *link_settings) in dce60_configure_encoder() argument
618 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in dce60_configure_encoder()
1118 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_output() argument
1131 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_output()
1138 cntl.lanes_number = link_settings->lane_count; in dce110_link_encoder_enable_dp_output()
1140 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output()
1157 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_mst_output() argument
1170 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_mst_output()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_link_encoder.c | 171 const struct dc_link_settings *link_settings, in update_cfg_data() argument
183 switch (link_settings->link_rate) { in update_cfg_data()
198 __func__, link_settings->link_rate); in update_cfg_data()
255 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_output() argument
266 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_output()
270 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn21_link_encoder_enable_dp_output()
273 enc1_configure_encoder(enc10, link_settings); in dcn21_link_encoder_enable_dp_output()
281 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_mst_output() argument
287 dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_mst_output()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | link_encoder.h | 121 const struct dc_link_settings *link_settings,
124 const struct dc_link_settings *link_settings,
132 const struct dc_link_settings *link_settings,
162 struct dc_link_settings *link_settings);
239 const struct dc_link_settings *link_settings,
275 const struct dc_link_settings *link_settings,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/hwss/ |
| H A D | link_hwss_hpo_dp.c | 47 const struct dc_link_settings *link_settings, in set_hpo_dp_hblank_min_symbol_width() argument
56 pipe_ctx->stream->link, link_settings); in set_hpo_dp_hblank_min_symbol_width()
111 const struct dc_link_settings *link_settings) in enable_hpo_dp_link_output() argument
125 link_settings, in enable_hpo_dp_link_output()
160 const struct dc_link_settings *link_settings, in set_hpo_dp_lane_settings() argument
165 link_settings, in set_hpo_dp_lane_settings()
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| H A D | link_hwss_hpo_dp.h | 34 const struct dc_link_settings *link_settings,
37 const struct dc_link_settings *link_settings,
46 const struct dc_link_settings *link_settings);
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| H A D | link_hwss_hpo_fixed_vs_pe_retimer_dp.c | 175 const struct dc_link_settings *link_settings, in set_hpo_fixed_vs_pe_retimer_dp_lane_settings() argument
180 link_settings, in set_hpo_fixed_vs_pe_retimer_dp_lane_settings()
194 const struct dc_link_settings *link_settings) in enable_hpo_fixed_vs_pe_retimer_dp_link_output() argument
196 if (link_settings->lane_count == LANE_COUNT_FOUR) in enable_hpo_fixed_vs_pe_retimer_dp_link_output()
199 enable_hpo_dp_link_output(link, link_res, signal, clock_source, link_settings); in enable_hpo_fixed_vs_pe_retimer_dp_link_output()
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| H A D | link_hwss_dio.c | 120 const struct dc_link_settings *link_settings) in enable_dio_dp_link_output() argument
127 link_settings, in enable_dio_dp_link_output()
132 link_settings, in enable_dio_dp_link_output()
161 const struct dc_link_settings *link_settings, in set_dio_dp_lane_settings() argument
166 link_enc->funcs->dp_set_lane_settings(link_enc, link_settings, lane_settings); in set_dio_dp_lane_settings()
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| H A D | link_hwss_dio.h | 43 const struct dc_link_settings *link_settings);
52 const struct dc_link_settings *link_settings,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.c | 488 const struct dc_link_settings *link_settings) in enc1_configure_encoder() argument
492 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in enc1_configure_encoder()
973 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_output() argument
986 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_output()
993 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_output()
995 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output()
1012 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_mst_output() argument
1025 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_mst_output()
1032 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_mst_output()
1034 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_mst_output()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dio_link_encoder.c | 111 const struct dc_link_settings *link_settings, in dcn32_link_encoder_enable_dp_output() argument
115 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn32_link_encoder_enable_dp_output()
136 struct dc_link_settings *link_settings) in dcn32_link_encoder_get_max_link_cap() argument
141 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn32_link_encoder_get_max_link_cap()
147 link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count); in dcn32_link_encoder_get_max_link_cap()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | link_hwss.h | 50 const struct dc_link_settings *link_settings,
58 const struct dc_link_settings *link_settings);
64 const struct dc_link_settings *link_settings,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_link_encoder.c | 53 struct dc_link_settings *link_settings) in dcn201_link_encoder_get_max_link_cap() argument
58 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn201_link_encoder_get_max_link_cap()
63 if (!value1 && !value2 && link_settings->lane_count > LANE_COUNT_TWO) in dcn201_link_encoder_get_max_link_cap()
64 link_settings->lane_count = LANE_COUNT_TWO; in dcn201_link_encoder_get_max_link_cap()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/accessories/ |
| H A D | link_fpga.c | 42 struct dc_link_settings link_settings = pipe_ctx->link_config.dp_link_settings; in dp_fpga_hpo_enable_link_and_stream() local
46 stream->link->cur_link_settings = link_settings; in dp_fpga_hpo_enable_link_and_stream()
51 &link_settings); in dp_fpga_hpo_enable_link_and_stream()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_validation.c | 226 const struct dc_link_settings *link_settings) in dp_link_bandwidth_kbps() argument
231 switch (link_dp_get_encoding_format(link_settings)) { in dp_link_bandwidth_kbps()
237 link_rate_per_lane_kbps = link_settings->link_rate * LINK_RATE_REF_FREQ_IN_KHZ * BITS_PER_DP_BYTE; in dp_link_bandwidth_kbps()
249 link_rate_per_lane_kbps = link_settings->link_rate * 10000; in dp_link_bandwidth_kbps()
257 …return link_rate_per_lane_kbps * link_settings->lane_count / 10000 * total_data_bw_efficiency_x100… in dp_link_bandwidth_kbps()
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| /openbmc/linux/drivers/net/ethernet/huawei/hinic/ |
| H A D | hinic_ethtool.c | 196 static void hinic_add_ethtool_link_mode(struct cmd_link_settings *link_settings, in hinic_add_ethtool_link_mode() argument
211 (link_settings, idx); in hinic_add_ethtool_link_mode()
214 (link_settings, idx); in hinic_add_ethtool_link_mode()
219 static void hinic_link_port_type(struct cmd_link_settings *link_settings, in hinic_link_port_type() argument
225 ETHTOOL_ADD_SUPPORTED_LINK_MODE(link_settings, TP); in hinic_link_port_type()
226 ETHTOOL_ADD_ADVERTISED_LINK_MODE(link_settings, TP); in hinic_link_port_type()
227 link_settings->port = PORT_TP; in hinic_link_port_type()
232 ETHTOOL_ADD_SUPPORTED_LINK_MODE(link_settings, FIBRE); in hinic_link_port_type()
233 ETHTOOL_ADD_ADVERTISED_LINK_MODE(link_settings, FIBRE); in hinic_link_port_type()
234 link_settings->port = PORT_FIBRE; in hinic_link_port_type()
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