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Searched refs:limit (Results 1 – 25 of 493) sorted by relevance

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/openbmc/qemu/include/qemu/
H A Dratelimit.h40 static inline int64_t ratelimit_calculate_delay(RateLimit *limit, uint64_t n) in ratelimit_calculate_delay() argument
45 QEMU_LOCK_GUARD(&limit->lock); in ratelimit_calculate_delay()
46 if (!limit->slice_quota) { in ratelimit_calculate_delay()
50 assert(limit->slice_ns); in ratelimit_calculate_delay()
52 if (limit->slice_end_time < now) { in ratelimit_calculate_delay()
55 limit->slice_start_time = now; in ratelimit_calculate_delay()
56 limit->slice_end_time = now + limit->slice_ns; in ratelimit_calculate_delay()
57 limit->dispatched = 0; in ratelimit_calculate_delay()
60 limit->dispatched += n; in ratelimit_calculate_delay()
61 if (limit->dispatched < limit->slice_quota) { in ratelimit_calculate_delay()
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/openbmc/qemu/hw/timer/
H A Dslavio_timer.c59 uint64_t limit; member
109 uint64_t count, limit; in slavio_timer_get_out() local
111 if (t->limit == 0) { /* free-run system or processor counter */ in slavio_timer_get_out()
112 limit = TIMER_MAX_COUNT32; in slavio_timer_get_out()
114 limit = t->limit; in slavio_timer_get_out()
116 count = limit - PERIODS_TO_LIMIT(ptimer_get_count(t->timer)); in slavio_timer_get_out()
118 trace_slavio_timer_get_out(t->limit, t->counthigh, t->count); in slavio_timer_get_out()
133 if (t->limit != 0) { in slavio_timer_irq()
137 if (!slavio_timer_is_user(tc) && t->limit != 0) { in slavio_timer_irq()
165 ret = t->limit & TIMER_LIMIT_MASK32; in slavio_timer_mem_readl()
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H A Darm_timer.c35 uint32_t limit; member
60 return s->limit; in arm_timer_read()
84 uint32_t limit; in arm_timer_recalibrate() local
89 limit = 0xffffffff; in arm_timer_recalibrate()
91 limit = 0xffff; in arm_timer_recalibrate()
94 limit = s->limit; in arm_timer_recalibrate()
96 ptimer_set_limit(s->timer, limit, reload); in arm_timer_recalibrate()
107 s->limit = value; in arm_timer_write()
143 s->limit = value; in arm_timer_write()
168 VMSTATE_UINT32(limit, arm_timer_state),
/openbmc/qemu/target/i386/hvf/
H A Dx86.c54 uint32_t limit; in x86_read_segment_descriptor() local
65 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_read_segment_descriptor()
68 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_read_segment_descriptor()
71 if (sel.index * 8 >= limit) { in x86_read_segment_descriptor()
84 uint32_t limit; in x86_write_segment_descriptor() local
88 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_write_segment_descriptor()
91 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_write_segment_descriptor()
94 if (sel.index * 8 >= limit) { in x86_write_segment_descriptor()
106 uint32_t limit = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_LIMIT); in x86_read_call_gate() local
109 if (gate * 8 >= limit) { in x86_read_call_gate()
H A Dx86_descr.c28 .limit = VMCS_GUEST_##seg##_LIMIT, \
35 int limit; member
50 return (uint32_t)rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_limit()
79 desc->limit = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_descriptor()
88 wvmcs(cpu->accel->fd, sf->limit, desc->limit); in vmx_write_segment_descriptor()
99 vmx_desc->limit = x86_segment_limit(desc); in x86_segment_descriptor_to_vmx()
115 x86_set_segment_limit(desc, vmx_desc->limit); in vmx_segment_to_x86_descriptor()
/openbmc/openbmc-test-automation/redfish/extended/
H A Dtest_power_capping.robot35 [Documentation] Change active power limit with system power on and
36 ... Power limit active.
69 ... msg=DCMI power limit should be ${max_power}.
77 [Documentation] Change active power limit with system power on and
78 ... deactivate power limit prior to change.
87 # Deactivate and check limit
90 ${cmd}= Catenate dcmi power set_limit limit ${near_max_power_50}
95 ... msg=Could not set power limit when power limiting deactivated.
99 [Documentation] Set power limit and activate power limit before
112 ... msg=dcmi power limit not set to ${power_setting} as expected.
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H A Dtest_escale_base.robot59 # Set the power limit via REST.
62 # Read the power limit using IPMI.
65 ... msg=Reading Power limit with IPMI failed after setting it with REST.
78 # Read the limit via REST.
81 ... msg=Reading power limit with REST failed after setting it with IPMI.
119 [Documentation] Set power and check limit.
123 # good_power A valid power setting, usually at a limit.
124 # outside_bounds_power A power level that is beyond the limit.
128 # Attempt set power limit out of range.
147 # Save the power limit setting.
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/openbmc/qemu/hw/pci/
H A Dpci_host.c57 static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit) in pci_adjust_config_limit() argument
59 if ((*limit > PCI_CONFIG_SPACE_SIZE) && in pci_adjust_config_limit()
61 *limit = PCI_CONFIG_SPACE_SIZE; in pci_adjust_config_limit()
77 uint32_t limit, uint32_t val, uint32_t len) in pci_host_config_write_common() argument
79 pci_adjust_config_limit(pci_get_bus(pci_dev), &limit); in pci_host_config_write_common()
80 if (limit <= addr) { in pci_host_config_write_common()
96 pci_dev->config_write(pci_dev, addr, val, MIN(len, limit - addr)); in pci_host_config_write_common()
100 uint32_t limit, uint32_t len) in pci_host_config_read_common() argument
104 pci_adjust_config_limit(pci_get_bus(pci_dev), &limit); in pci_host_config_read_common()
105 if (limit <= addr) { in pci_host_config_read_common()
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H A Dpcie_host.c42 uint32_t limit; in pcie_mmcfg_data_write() local
48 limit = pci_config_size(pci_dev); in pcie_mmcfg_data_write()
49 pci_host_config_write_common(pci_dev, addr, limit, val, len); in pcie_mmcfg_data_write()
60 uint32_t limit; in pcie_mmcfg_data_read() local
66 limit = pci_config_size(pci_dev); in pcie_mmcfg_data_read()
67 return pci_host_config_read_common(pci_dev, addr, limit, len); in pcie_mmcfg_data_read()
/openbmc/qemu/hw/core/
H A Dptimer.c25 uint64_t limit; member
83 delta = s->delta = s->limit; in ptimer_reload()
102 if (s->enabled == 1 && s->limit == 0) { in ptimer_reload()
114 if (s->enabled == 1 && s->limit != 0) { in ptimer_reload()
175 if (s->delta == 0 || s->limit == 0) { in ptimer_tick()
189 s->delta = s->limit; in ptimer_tick()
265 if (!oneshot && s->delta == s->limit) { in ptimer_get_count()
270 if (counter == s->limit + DELTA_ADJUST) { in ptimer_get_count()
273 } else if (counter == s->limit) { in ptimer_get_count()
398 void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) in ptimer_set_limit() argument
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/openbmc/qemu/docs/devel/migration/
H A Ddirty-limit.rst1 Dirty limit
4 The dirty limit, short for dirty page rate upper limit, is a new capability
36 page rate value and the corresponding upper limit of the VM:
40 limit is specified by caller, therefore fetch it directly.
47 rate progressively down to the upper limit without oscillation. To
50 to the limit, which is used when the current dirty page rate is far
51 from the limit; the second is to add or subtract a fixed time when
52 the current dirty page rate is close to the limit.
60 to step PREPARE (1) until the dirty limit is reached.
68 In summary, thanks to the KVM dirty ring technology, the dirty limit
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/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dmodel_206ax.c164 msr_t limit; in set_power_limits() local
200 limit.lo = 0; in set_power_limits()
201 limit.lo |= tdp & PKG_POWER_LIMIT_MASK; in set_power_limits()
202 limit.lo |= PKG_POWER_LIMIT_EN; in set_power_limits()
203 limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) << in set_power_limits()
207 limit.hi = 0; in set_power_limits()
208 limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; in set_power_limits()
209 limit.hi |= PKG_POWER_LIMIT_EN; in set_power_limits()
212 msr_write(MSR_PKG_POWER_LIMIT, limit); in set_power_limits()
217 limit.hi = 0; in set_power_limits()
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/openbmc/openbmc/poky/bitbake/lib/bs4/
H A Dcss.py126 def select(self, select, namespaces=None, limit=0, flags=0, **kwargs): argument
152 if limit is None:
153 limit = 0
157 select, self.tag, self._ns(namespaces, select), limit, flags,
162 def iselect(self, select, namespaces=None, limit=0, flags=0, **kwargs): argument
189 select, self.tag, self._ns(namespaces, select), limit, flags, **kwargs
/openbmc/qemu/hw/sensor/
H A Dtmp105.c57 if (s->temperature < s->limit[0]) { in tmp105_alarm_update()
62 if (s->temperature >= s->limit[1]) { in tmp105_alarm_update()
74 if (s->temperature < s->limit[0]) { in tmp105_alarm_update()
79 if (s->temperature >= s->limit[1]) { in tmp105_alarm_update()
145 s->buf[s->len++] = ((uint16_t) s->limit[0]) >> 8; in tmp105_read()
146 s->buf[s->len++] = ((uint16_t) s->limit[0]) >> 0; in tmp105_read()
150 s->buf[s->len++] = ((uint16_t) s->limit[1]) >> 8; in tmp105_read()
151 s->buf[s->len++] = ((uint16_t) s->limit[1]) >> 0; in tmp105_read()
178 s->limit[s->pointer & 1] = (int16_t) in tmp105_write()
271 VMSTATE_INT16_ARRAY(limit, TMP105State, 2),
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/openbmc/u-boot/cmd/
H A Dread.c23 ulong limit = 0u; in do_read() local
58 limit = part_info.size; in do_read()
61 limit = ~0; in do_read()
64 if (cnt + blk > limit) { in do_read()
/openbmc/qemu/target/i386/tcg/system/
H A Dsmm_helper.c62 x86_stl_phys(cs, sm_state + offset + 4, dt->limit); in do_smm_enter()
67 x86_stl_phys(cs, sm_state + 0x7e64, env->gdt.limit); in do_smm_enter()
71 x86_stl_phys(cs, sm_state + 0x7e74, env->ldt.limit); in do_smm_enter()
75 x86_stl_phys(cs, sm_state + 0x7e84, env->idt.limit); in do_smm_enter()
79 x86_stl_phys(cs, sm_state + 0x7e94, env->tr.limit); in do_smm_enter()
128 x86_stl_phys(cs, sm_state + 0x7f60, env->tr.limit); in do_smm_enter()
133 x86_stl_phys(cs, sm_state + 0x7f7c, env->ldt.limit); in do_smm_enter()
137 x86_stl_phys(cs, sm_state + 0x7f70, env->gdt.limit); in do_smm_enter()
140 x86_stl_phys(cs, sm_state + 0x7f54, env->idt.limit); in do_smm_enter()
151 x86_stl_phys(cs, sm_state + offset + 4, dt->limit); in do_smm_enter()
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/openbmc/u-boot/disk/
H A Dpart_amiga.c131 int limit; in get_rdisk() local
136 limit = simple_strtoul(s, NULL, 10); in get_rdisk()
138 limit = AMIGA_BLOCK_LIMIT; in get_rdisk()
140 for (i=0; i<limit; i++) in get_rdisk()
171 int limit; in get_bootcode() local
176 limit = simple_strtoul(s, NULL, 10); in get_bootcode()
178 limit = AMIGA_BLOCK_LIMIT; in get_bootcode()
180 PRINTF("Scanning for BOOT from 0 to %d\n", limit); in get_bootcode()
182 for (i = 0; i < limit; i++) in get_bootcode()
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/
H A D0025-gcc-testsuite-tweaks-for-mips-OE.patch77 + global do-what-limit
81 + if [info exists do-what-limit] then {
82 + # Demote run tests to $do-what-limit if set
85 + set do_what ${do-what-limit}
86 + set dg-do-what ${do-what-limit}
149 + global do-what-limit
157 + set do-what-limit link
165 + set do-what-limit run
168 + unset do-what-limit
176 + global do-what-limit
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/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dcpu.c651 msr_t limit; in cpu_set_power_limits() local
688 limit.lo = 0; in cpu_set_power_limits()
689 limit.lo |= tdp & PKG_POWER_LIMIT_MASK; in cpu_set_power_limits()
690 limit.lo |= PKG_POWER_LIMIT_EN; in cpu_set_power_limits()
691 limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) << in cpu_set_power_limits()
695 limit.hi = 0; in cpu_set_power_limits()
696 limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; in cpu_set_power_limits()
697 limit.hi |= PKG_POWER_LIMIT_EN; in cpu_set_power_limits()
700 msr_write(MSR_PKG_POWER_LIMIT, limit); in cpu_set_power_limits()
703 writel(limit.lo, MCHBAR_REG(MCH_PKG_POWER_LIMIT_LO)); in cpu_set_power_limits()
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/openbmc/u-boot/lib/lzma/
H A DLzmaDec.c31 #define TREE_DECODE(probs, limit, i) \ argument
32 { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
59 #define TREE_DECODE_CHECK(probs, limit, i) \ argument
60 { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
134 static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit) in LzmaDec_DecodeReal() argument
273 unsigned limit, offset; in LzmaDec_DecodeReal() local
280 limit = (1 << kLenNumLowBits); in LzmaDec_DecodeReal()
291 limit = (1 << kLenNumMidBits); in LzmaDec_DecodeReal()
298 limit = (1 << kLenNumHighBits); in LzmaDec_DecodeReal()
301 TREE_DECODE(probLen, limit, len); in LzmaDec_DecodeReal()
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/openbmc/qemu/bsd-user/i386/
H A Dtarget_arch_cpu.c35 void bsd_i386_write_dt(void *ptr, unsigned long addr, unsigned long limit, in bsd_i386_write_dt() argument
40 e1 = (addr << 16) | (limit & 0xffff); in bsd_i386_write_dt()
41 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); in bsd_i386_write_dt()
/openbmc/qemu/bsd-user/x86_64/
H A Dtarget_arch_cpu.c36 unsigned long limit, int flags) in bsd_x86_64_write_dt() argument
40 e1 = (addr << 16) | (limit & 0xffff); in bsd_x86_64_write_dt()
41 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); in bsd_x86_64_write_dt()
/openbmc/u-boot/arch/arm/mach-omap2/omap4/
H A Dboot.c64 unsigned int limit; in omap_reboot_mode() local
73 limit = (length < OMAP_REBOOT_REASON_SIZE) ? length : in omap_reboot_mode()
76 for (i = 0; i < (limit - 1); i++) in omap_reboot_mode()
/openbmc/u-boot/lib/efi/
H A Defi_stub.c37 uint16_t limit; member
165 for (ptr = (uint64_t *)(unsigned long)gdt.addr, i = 0; i < gdt.limit; in get_codeseg32()
168 uint64_t base, limit; in get_codeseg32() local
177 limit = ((desc >> GDT_LIMIT_LOW_SHIFT) & GDT_LIMIT_LOW_MASK) | in get_codeseg32()
181 limit <<= 12; in get_codeseg32()
186 CONFIG_SYS_TEXT_BASE + CONFIG_SYS_MONITOR_LEN < limit in get_codeseg32()
195 printhex8(gdt.limit); in get_codeseg32()
199 for (i = 0; i < gdt.limit; i += 8) { in get_codeseg32()
/openbmc/qemu/hw/sparc64/
H A Dtrace-events22 … char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) "%s set_limit limit=0x%"PRIx64 " (%s…
23 sparc64_cpu_tick_set_limit_zero(const char *name) "%s set_limit limit=ZERO - not starting timer"

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