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Searched refs:lfsr_wr_rd_bank_0_dqs (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c209 .lfsr_wr_rd_bank_0_dqs = RW_MGR_LFSR_WR_RD_BANK_0_DQS,
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h143 u8 lfsr_wr_rd_bank_0_dqs; member
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c1102 writel(rwcfg->lfsr_wr_rd_bank_0_dqs, in rw_mgr_mem_calibrate_write_test_issue()