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Searched refs:lcdc (Results 1 – 25 of 95) sorted by relevance

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/openbmc/linux/drivers/video/fbdev/omap/
H A Dlcdc.c69 } lcdc; variable
178 src = lcdc.vram_phys + lcdc.frame_offset; in setup_lcd_dma()
188 xelem = lcdc.xres * lcdc.bpp / 8 / esize; in setup_lcd_dma()
198 xelem = lcdc.yres * lcdc.bpp / 16; in setup_lcd_dma()
314 lcdc.bpp = 8; in omap_lcdc_setup_plane()
371 plane, enable, lcdc.update_mode, lcdc.ext_mode); in omap_lcdc_enable_plane()
599 lcdc.dma_callback(lcdc.dma_callback_data); in lcdc_dma_handler()
634 lcdc.vram_virt = dma_alloc_wc(lcdc.fbdev->dev, lcdc.vram_size, in alloc_fbmem()
645 memset(lcdc.vram_virt, 0, lcdc.vram_size); in alloc_fbmem()
652 dma_free_wc(lcdc.fbdev->dev, lcdc.vram_size, lcdc.vram_virt, in free_fbmem()
[all …]
H A DMakefile13 objs-yy := omapfb_main.o lcdc.o
/openbmc/u-boot/drivers/video/sunxi/
H A Dlcdc.c33 writel(0, &lcdc->ctrl); /* Disable tcon */ in lcdc_init()
107 writel(0, &lcdc->tcon0_hv_intf); in lcdc_tcon0_mode_set()
108 writel(0, &lcdc->tcon0_cpu_intf); in lcdc_tcon0_mode_set()
130 &lcdc->tcon0_frm_ctrl); in lcdc_tcon0_mode_set()
143 writel(val, &lcdc->tcon0_io_polarity); in lcdc_tcon0_mode_set()
145 writel(0, &lcdc->tcon0_io_tristate); in lcdc_tcon0_mode_set()
170 &lcdc->tcon1_timing_source); in lcdc_tcon1_mode_set()
172 &lcdc->tcon1_timing_scale); in lcdc_tcon1_mode_set()
174 &lcdc->tcon1_timing_out); in lcdc_tcon1_mode_set()
197 writel(val, &lcdc->tcon1_io_polarity); in lcdc_tcon1_mode_set()
[all …]
H A Dsunxi_lcd.c42 struct sunxi_lcdc_reg * const lcdc = in sunxi_lcd_enable() local
53 lcdc_init(lcdc); in sunxi_lcd_enable()
57 lcdc_tcon0_mode_set(lcdc, edid, clk_div, false, in sunxi_lcd_enable()
59 lcdc_enable(lcdc, priv->panel_bpp); in sunxi_lcd_enable()
H A DMakefile6 obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o simplefb_common.o lcdc.o tve_common.o ../videomodes.o
7 obj-$(CONFIG_VIDEO_DE2) += sunxi_de2.o sunxi_dw_hdmi.o simplefb_common.o lcdc.o ../dw_hdmi.o sunxi_…
H A Dsunxi_dw_hdmi.c258 struct sunxi_lcdc_reg *lcdc; in sunxi_dw_hdmi_lcdc_init() local
261 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; in sunxi_dw_hdmi_lcdc_init()
271 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD1_BASE; in sunxi_dw_hdmi_lcdc_init()
282 lcdc_init(lcdc); in sunxi_dw_hdmi_lcdc_init()
283 lcdc_tcon1_mode_set(lcdc, edid, false, false); in sunxi_dw_hdmi_lcdc_init()
284 lcdc_enable(lcdc, bpp); in sunxi_dw_hdmi_lcdc_init()
H A Dsunxi_display.c525 struct sunxi_lcdc_reg * const lcdc = in sunxi_lcdc_init() local
545 lcdc_init(lcdc); in sunxi_lcdc_init()
647 struct sunxi_lcdc_reg * const lcdc = local
683 struct sunxi_lcdc_reg * const lcdc = local
690 lcdc_tcon1_mode_set(lcdc, &timing, use_portd_hvsync,
928 struct sunxi_lcdc_reg * const lcdc = local
943 lcdc_enable(lcdc, sunxi_display.depth);
973 lcdc_enable(lcdc, sunxi_display.depth);
985 lcdc_enable(lcdc, sunxi_display.depth);
991 lcdc_enable(lcdc, sunxi_display.depth);
[all …]
/openbmc/linux/drivers/gpu/drm/imx/lcdc/
H A Dimx-lcdc.c369 struct imx_lcdc *lcdc = arg; in imx_lcdc_irq_handler() local
385 struct imx_lcdc *lcdc; in imx_lcdc_probe() local
394 if (IS_ERR(lcdc)) in imx_lcdc_probe()
395 return PTR_ERR(lcdc); in imx_lcdc_probe()
397 drm = &lcdc->drm; in imx_lcdc_probe()
400 if (IS_ERR(lcdc->base)) in imx_lcdc_probe()
409 if (IS_ERR(lcdc->clk_ipg)) in imx_lcdc_probe()
413 if (IS_ERR(lcdc->clk_ahb)) in imx_lcdc_probe()
417 if (IS_ERR(lcdc->clk_per)) in imx_lcdc_probe()
445 lcdc->connector = drm_bridge_connector_init(drm, &lcdc->pipe.encoder); in imx_lcdc_probe()
[all …]
H A DMakefile1 obj-$(CONFIG_DRM_IMX_LCDC) += imx-lcdc.o
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Datmel,lcdc.txt6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
30 compatible = "atmel,at91sam9g45-lcdc";
44 compatible = "atmel,at91sam9263-lcdc";
H A Dmarvell,pxa2xx-lcdc.txt6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
25 compatible = "marvell,pxa2xx-lcdc";
/openbmc/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx-lcdc.yaml4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
25 - const: fsl,imx25-lcdc
26 - const: fsl,imx21-lcdc
74 - fsl,imx1-lcdc
75 - fsl,imx21-lcdc
104 lcdc@53fbc000 {
105 compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc";
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm8660.c752 MSM_PIN_FUNCTION(lcdc),
773 PINGROUP(0, lcdc, dsub, _, _, _, _, _),
774 PINGROUP(1, lcdc, dsub, _, _, _, _, _),
775 PINGROUP(2, lcdc, dsub, _, _, _, _, _),
776 PINGROUP(3, lcdc, dsub, _, _, _, _, _),
777 PINGROUP(4, lcdc, dsub, _, _, _, _, _),
778 PINGROUP(5, lcdc, dsub, _, _, _, _, _),
779 PINGROUP(6, lcdc, dsub, _, _, _, _, _),
780 PINGROUP(7, lcdc, dsub, _, _, _, _, _),
781 PINGROUP(8, lcdc, dsub, _, _, _, _, _),
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dsh_mobile_lcdcfb.c460 sh_mobile_lcdc_clk_on(ch->lcdc); in sh_mobile_lcdc_deferred_io()
680 ldintr = lcdc_read(ch->lcdc, _LDINTR); in sh_mobile_lcdc_wait_for_vsync()
682 lcdc_write(ch->lcdc, _LDINTR, ldintr); in sh_mobile_lcdc_wait_for_vsync()
859 lcdc_write(ovl->channel->lcdc, LDBCR, in sh_mobile_lcdc_overlay_setup()
1518 struct sh_mobile_lcdc_priv *lcdc = ovl->channel->lcdc; in sh_mobile_lcdc_overlay_fb_register() local
1878 sh_mobile_lcdc_stop(ch->lcdc); in sh_mobile_lcdc_set_par()
2016 sh_mobile_lcdc_clk_off(ch->lcdc); in sh_mobile_lcdc_channel_fb_register()
2276 ch->tx_dev->lcdc = NULL; in sh_mobile_lcdc_remove()
2408 struct device *dev = ch->lcdc->dev; in sh_mobile_lcdc_channel_init()
2497 ch->tx_dev->lcdc = ch; in sh_mobile_lcdc_channel_init()
[all …]
H A Dsh_mobile_lcdcfb.h44 struct sh_mobile_lcdc_chan *lcdc; member
57 struct sh_mobile_lcdc_priv *lcdc; member
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dlcdc.h117 void lcdc_init(struct sunxi_lcdc_reg * const lcdc);
118 void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth);
119 void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
123 void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
/openbmc/linux/drivers/gpu/drm/imx/
H A DMakefile5 obj-$(CONFIG_DRM_IMX_LCDC) += lcdc/
H A DKconfig5 source "drivers/gpu/drm/imx/lcdc/Kconfig"
/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,lvds.yaml53 const: lcdc
138 pinctrl-names = "lcdc";
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa2xx.dtsi154 lcdc: lcd-controller@40500000 { label
155 compatible = "marvell,pxa2xx-lcdc";
/openbmc/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dtilcdc.txt41 tfp410 DVI encoder or lcd panel to lcdc
58 ti,hwmods = "lcdc";
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts34 &lcdc {
H A Dimx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts34 &lcdc {
H A Dimx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts53 &lcdc {
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dlpc1850-cgu.txt124 lcdc: lcdc@40008000 {

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