| /openbmc/u-boot/drivers/video/sunxi/ |
| H A D | lcdc.c | 30 void lcdc_init(struct sunxi_lcdc_reg * const lcdc) in lcdc_init() argument
33 writel(0, &lcdc->ctrl); /* Disable tcon */ in lcdc_init()
34 writel(0, &lcdc->int0); /* Disable all interrupts */ in lcdc_init()
37 clrbits_le32(&lcdc->tcon0_dclk, SUNXI_LCDC_TCON0_DCLK_ENABLE); in lcdc_init()
40 writel(0xffffffff, &lcdc->tcon0_io_tristate); in lcdc_init()
41 writel(0xffffffff, &lcdc->tcon1_io_tristate); in lcdc_init()
44 void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth) in lcdc_enable() argument
46 setbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_TCON_ENABLE); in lcdc_enable()
48 setbits_le32(&lcdc->tcon0_lvds_intf, SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE); in lcdc_enable()
49 setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0); in lcdc_enable()
[all …]
|
| H A D | sunxi_lcd.c | 42 struct sunxi_lcdc_reg * const lcdc = in sunxi_lcd_enable() local
53 lcdc_init(lcdc); in sunxi_lcd_enable()
57 lcdc_tcon0_mode_set(lcdc, edid, clk_div, false, in sunxi_lcd_enable()
59 lcdc_enable(lcdc, priv->panel_bpp); in sunxi_lcd_enable()
|
| H A D | Makefile | 6 obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o simplefb_common.o lcdc.o tve_common.o ../videomodes.o
7 obj-$(CONFIG_VIDEO_DE2) += sunxi_de2.o sunxi_dw_hdmi.o simplefb_common.o lcdc.o ../dw_hdmi.o sunxi_…
|
| H A D | sunxi_dw_hdmi.c | 258 struct sunxi_lcdc_reg *lcdc; in sunxi_dw_hdmi_lcdc_init() local
261 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; in sunxi_dw_hdmi_lcdc_init()
271 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD1_BASE; in sunxi_dw_hdmi_lcdc_init()
282 lcdc_init(lcdc); in sunxi_dw_hdmi_lcdc_init()
283 lcdc_tcon1_mode_set(lcdc, edid, false, false); in sunxi_dw_hdmi_lcdc_init()
284 lcdc_enable(lcdc, bpp); in sunxi_dw_hdmi_lcdc_init()
|
| H A D | sunxi_display.c | 525 struct sunxi_lcdc_reg * const lcdc = in sunxi_lcdc_init() local
545 lcdc_init(lcdc); in sunxi_lcdc_init()
647 struct sunxi_lcdc_reg * const lcdc = local
674 lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
683 struct sunxi_lcdc_reg * const lcdc = local
690 lcdc_tcon1_mode_set(lcdc, &timing, use_portd_hvsync,
928 struct sunxi_lcdc_reg * const lcdc = local
943 lcdc_enable(lcdc, sunxi_display.depth);
973 lcdc_enable(lcdc, sunxi_display.depth);
985 lcdc_enable(lcdc, sunxi_display.depth);
[all …]
|
| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 117 void lcdc_init(struct sunxi_lcdc_reg * const lcdc);
118 void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth);
119 void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
123 void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | am335x-brppt1-spi.dts | 30 ds1ctrl = &lcdc;
260 &lcdc {
|
| H A D | am335x-brppt1-mmc.dts | 30 ds1ctrl = &lcdc;
239 &lcdc {
|
| H A D | am335x-brppt1-nand.dts | 30 ds1ctrl = &lcdc;
229 &lcdc {
|
| H A D | am335x-base0033.dts | 86 &lcdc {
|
| H A D | am335x-boneblack.dts | 73 &lcdc {
|
| H A D | am33xx.dtsi | 935 lcdc: lcdc@4830e000 { label
939 ti,hwmods = "lcdc";
|
| H A D | da850-lcdk.dts | 327 &lcdc {
|
| H A D | am335x-brxre1.dts | 245 &lcdc {
|
| H A D | rk3288-miqi.dtsi | 30 lcdc-supply = <&vcc_io>;
|
| H A D | da850-evm.dts | 214 &lcdc {
|
| H A D | am335x-pxm2.dtsi | 235 &lcdc {
|
| H A D | am335x-pdu001.dts | 423 &lcdc {
|
| H A D | rk3288-phycore-som.dtsi | 85 lcdc-supply = <&vdd_3v3_io>;
|
| H A D | rk3288-popmetal.dtsi | 83 lcdc-supply = <&vcc_io>;
|
| H A D | am335x-rut.dts | 274 &lcdc {
|
| H A D | at91sam9261.dtsi | 83 compatible = "atmel,at91sam9261-lcdc";
|
| H A D | am335x-evmsk.dts | 716 &lcdc {
|
| H A D | rk3288-veyron.dtsi | 217 lcdc-supply = <&vcc33_lcd>;
|
| H A D | rk3128.dtsi | 129 lcdc {
|