Home
last modified time | relevance | path

Searched refs:lcd0_ch1_clk_cfg (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/video/sunxi/
H A Dlcdc.c325 CCM_LCD_CH1_CTRL_M(best_m), &ccm->lcd0_ch1_clk_cfg); in lcdc_pll_set()
327 setbits_le32(&ccm->lcd0_ch1_clk_cfg, in lcdc_pll_set()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun4i.h75 u32 lcd0_ch1_clk_cfg; /* 0x12c */ member
H A Dclock_sun6i.h92 u32 lcd0_ch1_clk_cfg; /* 0x12c LCD0 CH1 module clock */ member