Searched refs:k2_div (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_hwseq.c | 340 …_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div) in dcn314_calculate_dccg_k1_k2_values() argument 351 *k2_div = PIXEL_RATE_DIV_BY_1; in dcn314_calculate_dccg_k1_k2_values() 355 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn314_calculate_dccg_k1_k2_values() 357 *k2_div = PIXEL_RATE_DIV_BY_4; in dcn314_calculate_dccg_k1_k2_values() 361 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn314_calculate_dccg_k1_k2_values() 364 *k2_div = PIXEL_RATE_DIV_BY_4; in dcn314_calculate_dccg_k1_k2_values() 366 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn314_calculate_dccg_k1_k2_values() 370 if ((*k1_div == PIXEL_RATE_DIV_NA) && (*k2_div == PIXEL_RATE_DIV_NA)) in dcn314_calculate_dccg_k1_k2_values()
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H A D | dcn314_hwseq.h | 40 …calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div);
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_hwseq.h | 74 …calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div);
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H A D | dcn32_hwseq.c | 1144 …_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div) in dcn32_calculate_dccg_k1_k2_values() argument 1155 *k2_div = PIXEL_RATE_DIV_BY_1; in dcn32_calculate_dccg_k1_k2_values() 1159 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn32_calculate_dccg_k1_k2_values() 1161 *k2_div = PIXEL_RATE_DIV_BY_4; in dcn32_calculate_dccg_k1_k2_values() 1165 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn32_calculate_dccg_k1_k2_values() 1168 *k2_div = PIXEL_RATE_DIV_BY_4; in dcn32_calculate_dccg_k1_k2_values() 1170 *k2_div = PIXEL_RATE_DIV_BY_2; in dcn32_calculate_dccg_k1_k2_values() 1174 if ((*k1_div == PIXEL_RATE_DIV_NA) && (*k2_div == PIXEL_RATE_DIV_NA)) in dcn32_calculate_dccg_k1_k2_values()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | hw_sequencer_private.h | 161 unsigned int *k2_div);
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hwseq.c | 689 unsigned int k2_div = PIXEL_RATE_DIV_NA; in dcn20_enable_stream_timing() local 692 hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div); in dcn20_enable_stream_timing() 697 k1_div, k2_div); in dcn20_enable_stream_timing() 2723 unsigned int k2_div = PIXEL_RATE_DIV_NA; in dcn20_enable_stream() local 2745 hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div); in dcn20_enable_stream() 2750 k1_div, k2_div); in dcn20_enable_stream()
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