Home
last modified time | relevance | path

Searched refs:ixSQ_WAVE_VALID_AND_IDLE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h7644 #define ixSQ_WAVE_VALID_AND_IDLE … macro
H A Dgc_9_4_3_offset.h7406 #define ixSQ_WAVE_VALID_AND_IDLE … macro
H A Dgc_11_0_0_offset.h11636 #define ixSQ_WAVE_VALID_AND_IDLE … macro
H A Dgc_11_0_3_offset.h12053 #define ixSQ_WAVE_VALID_AND_IDLE … macro
H A Dgc_10_3_0_offset.h13421 #define ixSQ_WAVE_VALID_AND_IDLE … macro