Home
last modified time | relevance | path

Searched refs:ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7588 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_1_offset.h12431 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_2_1_0_offset.h13035 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_1_0_offset.h13275 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_2_offset.h14245 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_2_1_offset.h13721 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_5_offset.h14351 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_4_offset.h346 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_2_0_offset.h13742 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_1_6_offset.h14842 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_2_offset.h15324 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_2_0_0_offset.h16699 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
H A Ddcn_3_0_0_offset.h17047 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17088 #define ixAZF0STREAM13_AZALIA_LATENCY_COUNTER_CONTROL macro