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Searched refs:ixAZALIA_INPUT_CRC1_CHANNEL7 (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h6715 #define ixAZALIA_INPUT_CRC1_CHANNEL7 0x7 macro
H A Ddce_11_0_d.h6877 #define ixAZALIA_INPUT_CRC1_CHANNEL7 0x7 macro
H A Ddce_11_2_d.h8222 #define ixAZALIA_INPUT_CRC1_CHANNEL7 0x7 macro
H A Ddce_12_0_offset.h18103 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7386 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_1_offset.h12229 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_1_0_offset.h13073 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_2_1_0_offset.h12833 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_2_offset.h14043 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_5_offset.h14149 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_4_offset.h199 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_2_1_offset.h13519 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_2_0_offset.h13540 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_2_offset.h15122 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_1_6_offset.h14640 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_2_0_0_offset.h16497 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro
H A Ddcn_3_0_0_offset.h16846 #define ixAZALIA_INPUT_CRC1_CHANNEL7 … macro