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Searched refs:ixAZALIA_CRC1_CHANNEL1 (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5464 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
H A Ddce_10_0_d.h6735 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
H A Ddce_11_0_d.h6897 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
H A Ddce_11_2_d.h8242 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
H A Ddce_12_0_offset.h18121 #define ixAZALIA_CRC1_CHANNEL1 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7404 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_0_1_offset.h12247 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_2_1_0_offset.h12851 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_1_0_offset.h13091 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_1_2_offset.h14061 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_2_1_offset.h13537 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_1_5_offset.h14167 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_1_4_offset.h217 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_2_0_offset.h13558 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_1_6_offset.h14658 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_0_2_offset.h15140 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_2_0_0_offset.h16515 #define ixAZALIA_CRC1_CHANNEL1 … macro
H A Ddcn_3_0_0_offset.h16864 #define ixAZALIA_CRC1_CHANNEL1 … macro