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Searched refs:ixAZALIA_CRC0_CHANNEL6 (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5456 #define ixAZALIA_CRC0_CHANNEL6 0x6 macro
H A Ddce_10_0_d.h6727 #define ixAZALIA_CRC0_CHANNEL6 0x6 macro
H A Ddce_11_0_d.h6889 #define ixAZALIA_CRC0_CHANNEL6 0x6 macro
H A Ddce_11_2_d.h8234 #define ixAZALIA_CRC0_CHANNEL6 0x6 macro
H A Ddce_12_0_offset.h18114 #define ixAZALIA_CRC0_CHANNEL6 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7397 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_0_1_offset.h12240 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_2_1_0_offset.h12844 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_1_0_offset.h13084 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_1_2_offset.h14054 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_2_1_offset.h13530 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_1_5_offset.h14160 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_1_4_offset.h210 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_2_0_offset.h13551 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_1_6_offset.h14651 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_0_2_offset.h15133 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_2_0_0_offset.h16508 #define ixAZALIA_CRC0_CHANNEL6 … macro
H A Ddcn_3_0_0_offset.h16857 #define ixAZALIA_CRC0_CHANNEL6 … macro