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Searched refs:ixAZALIA_CRC0_CHANNEL2 (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5452 #define ixAZALIA_CRC0_CHANNEL2 0x2 macro
H A Ddce_10_0_d.h6723 #define ixAZALIA_CRC0_CHANNEL2 0x2 macro
H A Ddce_11_0_d.h6885 #define ixAZALIA_CRC0_CHANNEL2 0x2 macro
H A Ddce_11_2_d.h8230 #define ixAZALIA_CRC0_CHANNEL2 0x2 macro
H A Ddce_12_0_offset.h18110 #define ixAZALIA_CRC0_CHANNEL2 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7393 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_0_1_offset.h12236 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_2_1_0_offset.h12840 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_1_0_offset.h13080 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_1_2_offset.h14050 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_2_1_offset.h13526 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_1_5_offset.h14156 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_1_4_offset.h206 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_2_0_offset.h13547 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_1_6_offset.h14647 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_0_2_offset.h15129 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_2_0_0_offset.h16504 #define ixAZALIA_CRC0_CHANNEL2 … macro
H A Ddcn_3_0_0_offset.h16853 #define ixAZALIA_CRC0_CHANNEL2 … macro