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Searched refs:is_q (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc1048 int is_q = type - TCG_TYPE_V64;
1049 tcg_out_insn(s, 3605, DUP, is_q, rd, rs, 1 << vece, 0);
2549 unsigned is_q = vecl;
2550 bool is_scalar = !is_q && vece == MO_64;
2572 tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2);
2579 tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2);
2583 tcg_out_insn(s, 3616, MUL, is_q, vece, a0, a1, a2);
2589 tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1);
2596 tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1);
2603 tcg_out_insn(s, 3606, BIC, is_q, a0, 0, cmode, imm8);
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/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a64.c631 /* Clear the bits above an N-bit vector, for N = (is_q ? 128 : 64).
634 static void clear_vec_high(DisasContext *s, bool is_q, int rd) in clear_vec_high() argument
640 tcg_gen_gvec_mov(MO_64, ofs, ofs, is_q ? 16 : 8, vsz); in clear_vec_high()
660 static void gen_gvec_fn2(DisasContext *s, bool is_q, int rd, int rn, in gen_gvec_fn2() argument
664 is_q ? 16 : 8, vec_full_reg_size(s)); in gen_gvec_fn2()
670 static void gen_gvec_fn2i(DisasContext *s, bool is_q, int rd, int rn, in gen_gvec_fn2i() argument
674 imm, is_q ? 16 : 8, vec_full_reg_size(s)); in gen_gvec_fn2i()
678 static void gen_gvec_fn3(DisasContext *s, bool is_q, int rd, int rn, int rm, in gen_gvec_fn3() argument
682 vec_full_reg_offset(s, rm), is_q ? 16 : 8, vec_full_reg_size(s)); in gen_gvec_fn3()
686 static void gen_gvec_fn4(DisasContext *s, bool is_q, in argument
695 gen_gvec_op2_ool(DisasContext * s,bool is_q,int rd,int rn,int data,gen_helper_gvec_2 * fn) gen_gvec_op2_ool() argument
704 gen_gvec_op3_ool(DisasContext * s,bool is_q,int rd,int rn,int rm,int data,gen_helper_gvec_3 * fn) gen_gvec_op3_ool() argument
716 gen_gvec_op3_fpst(DisasContext * s,bool is_q,int rd,int rn,int rm,bool is_fp16,int data,gen_helper_gvec_3_ptr * fn) gen_gvec_op3_fpst() argument
728 gen_gvec_op4_ool(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,int data,gen_helper_gvec_4 * fn) gen_gvec_op4_ool() argument
742 gen_gvec_op4_env(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,int data,gen_helper_gvec_4_ptr * fn) gen_gvec_op4_env() argument
758 gen_gvec_op4_fpst(DisasContext * s,bool is_q,int rd,int rn,int rm,int ra,bool is_fp16,int data,gen_helper_gvec_4_ptr * fn) gen_gvec_op4_fpst() argument
9761 handle_simd_shift_intfp_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int opcode,int rn,int rd) handle_simd_shift_intfp_conv() argument
9805 handle_simd_shift_fpint_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int rn,int rd) handle_simd_shift_fpint_conv() argument
10053 handle_2misc_fcmp_zero(DisasContext * s,int opcode,bool is_scalar,bool is_u,bool is_q,int size,int rn,int rd) handle_2misc_fcmp_zero() argument
10182 handle_2misc_reciprocal(DisasContext * s,int opcode,bool is_scalar,bool is_u,bool is_q,int size,int rn,int rd) handle_2misc_reciprocal() argument
10255 handle_2misc_narrow(DisasContext * s,bool scalar,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_2misc_narrow() argument
10573 bool is_q = extract32(insn, 30, 1); disas_simd_shift_imm() local
10607 handle_2misc_widening(DisasContext * s,int opcode,bool is_q,int size,int rn,int rd) handle_2misc_widening() argument
10652 handle_rev(DisasContext * s,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_rev() argument
10722 handle_2misc_pairwise(DisasContext * s,int opcode,bool u,bool is_q,int size,int rn,int rd) handle_2misc_pairwise() argument
10788 handle_shll(DisasContext * s,bool is_q,int size,int rn,int rd) handle_shll() argument
10826 bool is_q = extract32(insn, 30, 1); disas_simd_two_reg_misc() local
11299 bool is_q; disas_simd_two_reg_misc_fp16() local
[all...]
H A Dvec_helper.c2022 static uint64_t load4_f16(uint64_t *ptr, int is_q, int is_2) in load4_f16() argument
2030 return ptr[is_q & is_2] >> ((is_2 & ~is_q) << 5); in load4_f16()
2044 int is_q = oprsz == 16; in do_fmlal() local
2048 n_4 = load4_f16(vn, is_q, is_2); in do_fmlal()
2049 m_4 = load4_f16(vm, is_q, is_2); in do_fmlal()
2108 int is_q = oprsz == 16; in do_fmlal_idx() local
2113 n_4 = load4_f16(vn, is_q, is_2); in do_fmlal_idx()