Searched refs:is_a64 (Results 1 – 13 of 13) sorted by relevance
19 if (is_a64(env)) { in common_semi_arg()30 if (is_a64(env)) { in common_semi_set_ret()39 return nr == TARGET_SYS_EXIT_EXTENDED || is_a64(cpu_env(cs)); in common_semi_sys_exit_extended()44 return is_a64(env); in is_64bit_semihosting()51 return is_a64(env) ? env->xregs[31] : env->regs[13]; in common_semi_stack_bottom()57 return is_a64(env); in common_semi_has_synccache()
154 if (is_a64(env)) { in arm_generate_debug_exceptions() 284 uint64_t pc = is_a64(env) ? env->pc : env->regs[15]; in bp_wp_matches() 404 pc = is_a64(env) ? env->pc : env->regs[15]; in arm_debug_check_breakpoint() 405 if ((is_a64(env) || !env->thumb) && (pc & 3) != 0) { in arm_debug_check_breakpoint() 487 uint64_t pc = is_a64(env) ? env->pc : env->regs[15]; in arm_debug_excp_handler()
2072 if (!is_a64(env)) { in kvm_arch_put_registers()2100 if (is_a64(env)) { in kvm_arch_put_registers()2127 if (el > 0 && !is_a64(env)) { in kvm_arch_put_registers()2277 if (is_a64(env)) { in kvm_arch_get_registers()2298 if (!is_a64(env)) { in kvm_arch_get_registers()2320 if (el > 0 && !is_a64(env)) { in kvm_arch_get_registers()
786 if (is_a64(env)) { in get_cpsr()805 } else if (is_a64(env)) { in put_cpsr()1000 if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) { in cpu_post_load()
59 if (is_a64(env)) { in arm_cpu_set_pc() 73 if (is_a64(env)) { in arm_cpu_get_pc() 91 if (is_a64(env)) { in arm_cpu_synchronize_from_tb() 105 if (is_a64(env)) { in arm_restore_state_to_opc() 1181 if (is_a64(env)) { in arm_disas_set_info() 1396 if (is_a64(env)) { in arm_cpu_dump_state()
1269 static inline bool is_a64(CPUARMState *env) in is_a64() 2508 if (is_a64(env) && extract32(env->pstate, 2, 2) == 3) { in arm_is_el3_or_mon() 2511 } else if (!is_a64(env) && in arm_is_el3_or_mon() 2607 /* This isn't valid for EL0 (if we're in EL0, is_a64() is what you want, in arm_el_is_aa64() 2711 if (is_a64(env)) { in arm_current_el() 3066 if (!is_a64(env)) {1266 static inline bool is_a64(CPUARMState *env) is_a64() function
249 if (!is_a64(env)) { in arm_cpu_write_elf64_note()
269 if (is_a64(env)) { in arm_pan_enabled() 286 if (!is_a64(env) && arm_current_el(env) == 3 && in access_el3_aa32ns() 3846 if (is_a64(env)) { in ats1h_write() 11788 * el0_a64 is is_a64(), else el0_a64 is ignored.11790 aarch64_sve_change_el(env, cur_el, new_el, is_a64(env)); in tcg_handle_semihosting() 11813 is_aa64 = is_a64(env);11914 if (is_a64(env)) { in aa64_va_parameter_tbid() 12013 if (is_a64(env)) { in sanitize_gran_size() 13106 if (is_a64(env)) {
80 param[i] = is_a64(env) ? env->xregs[i] : env->regs[i]; in arm_handle_psci_call()83 if ((param[0] & QEMU_PSCI_0_2_64BIT) && !is_a64(env)) { in arm_handle_psci_call()167 if (is_a64(env)) { in arm_handle_psci_call()191 if (!(param[1] & QEMU_PSCI_0_2_64BIT) || is_a64(env)) { in arm_handle_psci_call()211 if (is_a64(env)) { in arm_handle_psci_call()
798 if (!is_a64(env) && arm_current_el(env) == 0 && ri->cp == 15 && in HELPER() 1043 if (secure && (!is_a64(env) || cur_el == 1)) { in HELPER()
416 if (is_a64(env)) { in rebuild_hflags_internal()
2815 bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF; in DO_MMLA_B()
2294 if (!is_a64(env) && !arm_is_el3_or_mon(env)) { in gicv3_irqfiq_access() 2356 if (!is_a64(env) && !arm_is_el3_or_mon(env)) { in gicv3_fiq_access() 2392 if (!is_a64(env) && !arm_is_el3_or_mon(env)) { in gicv3_irq_access()