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Searched refs:int_level (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/hw/net/
H A Dsmc91c111.c56 uint8_t int_level; member
128 s->int_level |= INT_TX_EMPTY; in smc91c111_update()
130 s->int_level |= INT_TX; in smc91c111_update()
131 level = (s->int_level & s->int_mask) != 0; in smc91c111_update()
177 s->int_level |= INT_ALLOC; in smc91c111_tx_alloc()
190 s->int_level |= INT_RCV; in smc91c111_pop_rx_fifo()
192 s->int_level &= ~INT_RCV; in smc91c111_pop_rx_fifo()
305 s->int_level = INT_TX_EMPTY; in smc91c111_reset()
396 s->int_level &= ~INT_ALLOC; in smc91c111_writeb()
609 return s->int_level; in smc91c111_readb()
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/openbmc/qemu/hw/char/
H A Dpl011.c134 flags = s->int_level & s->int_enabled; in pl011_update()
181 s->int_level &= ~ INT_RX; in pl011_read()
216 r = s->int_level; in pl011_read()
219 r = s->int_level & s->int_enabled; in pl011_read()
306 il = s->int_level & ~(INT_DSR | INT_DCD | INT_CTS | INT_RI); in pl011_loopback_mdmctrl()
313 s->int_level = il; in pl011_loopback_mdmctrl()
370 s->int_level |= INT_TX; in pl011_write()
418 s->int_level &= ~value; in pl011_write()
460 s->int_level |= INT_RX; in pl011_put_fifo()
559 VMSTATE_UINT32(int_level, PL011State),
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/openbmc/qemu/hw/timer/
H A Dsh_timer.c43 int int_level; member
54 int new_level = s->int_level && (s->tcr & TIMER_TCR_UNIE); in sh_timer_update()
59 s->old_level = s->int_level; in sh_timer_update()
60 s->int_level = new_level; in sh_timer_update()
73 return s->tcr | (s->int_level ? TIMER_TCR_UNF : 0); in sh_timer_read()
167 s->int_level = 0; in sh_timer_write()
224 s->int_level = s->enabled; in sh_timer_tick()
H A Darm_timer.c37 int int_level; member
46 if (s->int_level && (s->control & TIMER_CTRL_IE)) { in arm_timer_update()
66 return s->int_level; in arm_timer_read()
70 return s->int_level; in arm_timer_read()
140 s->int_level = 0; in arm_timer_write()
158 s->int_level = 1; in arm_timer_tick()
169 VMSTATE_INT32(int_level, arm_timer_state),
/openbmc/qemu/hw/arm/
H A Dintegratorcp.c52 uint32_t int_level; member
75 VMSTATE_UINT32(int_level, IntegratorCMState),
130 return s->int_level & s->irq_enabled; in integratorcm_read()
132 return s->int_level; in integratorcm_read()
136 return s->int_level & 1; in integratorcm_read()
138 return s->int_level & s->fiq_enabled; in integratorcm_read()
140 return s->int_level; in integratorcm_read()
186 if (s->int_level & (s->irq_enabled | s->fiq_enabled)) in integratorcm_update()
237 s->int_level |= (value & 1); in integratorcm_write()
241 s->int_level &= ~(value & 1); in integratorcm_write()
/openbmc/linux/arch/sparc/include/asm/
H A Dhead_32.h72 #define TRAP_ENTRY_INTERRUPT(int_level) \ argument
73 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
/openbmc/qemu/include/hw/char/
H A Dpl011.h42 uint32_t int_level; member
/openbmc/linux/drivers/staging/vme_user/
H A Dvme_fake.c73 int int_level; member
101 vme_irq_handler(fake_bridge, bridge->int_level, bridge->int_statid); in fake_VIRQ_tasklet()
136 bridge->int_level = level; in fake_irq_generate()