Searched refs:int_enabled (Results 1 – 5 of 5) sorted by relevance
79 if (s->int_enabled) { in goldfish_tty_cmd()83 s->int_enabled = false; in goldfish_tty_cmd()87 if (!s->int_enabled) { in goldfish_tty_cmd()91 s->int_enabled = true; in goldfish_tty_cmd()119 if (s->int_enabled && fifo8_is_empty(&s->rx_fifo)) { in goldfish_tty_cmd()188 if (s->int_enabled && !fifo8_is_empty(&s->rx_fifo)) { in goldfish_tty_receive()200 s->int_enabled = false; in goldfish_tty_reset()238 VMSTATE_BOOL(int_enabled, GoldfishTTYState),
137 flags = s->int_level & s->int_enabled; in pl011_update()307 r = s->int_enabled; in pl011_read()313 r = s->int_level & s->int_enabled; in pl011_read()468 s->int_enabled = value; in pl011_write()603 VMSTATE_UINT32(int_enabled, PL011State),659 s->int_enabled = 0; in pl011_reset()
31 bool int_enabled; member
40 uint32_t int_enabled; member
95 pub int_enabled: Interrupt, field209 IMSC => u32::from(self.int_enabled), in read()211 MIS => u32::from(self.int_level & self.int_enabled), in read()273 self.int_enabled = Interrupt::from(value); in write()406 self.int_enabled = 0.into(); in reset()644 let flags = regs.int_level & regs.int_enabled; in update()757 vmstate_of!(PL011Registers, int_enabled),