Searched refs:inst_offset (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dm_services.h | 151 #define dm_write_reg_soc15(ctx, reg, inst_offset, value) \ argument
152 …dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __…
154 #define dm_read_reg_soc15(ctx, reg, inst_offset) \ argument
155 dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__)
157 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
158 …date_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, \
161 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
162 …et_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \
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| /openbmc/linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx10.asm | 411 global_store_dword_addtid v0, [s_save_ttmps_lo, s_save_ttmps_hi] inst_offset:0x40 slc:1 glc:1
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 955 inst_offset = reg_offsets[pipe_ctx->stream_res.tg->inst].fmt; in dcn10_enable_stream_timing()
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