| /openbmc/qemu/target/arm/tcg/ |
| H A D | cpu32.c | 1013 { .name = "arm926", .initfn = arm926_initfn },
1014 { .name = "arm946", .initfn = arm946_initfn },
1015 { .name = "arm1026", .initfn = arm1026_initfn },
1021 { .name = "arm1136-r2", .initfn = arm1136_r2_initfn },
1022 { .name = "arm1136", .initfn = arm1136_initfn },
1023 { .name = "arm1176", .initfn = arm1176_initfn },
1024 { .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
1025 { .name = "cortex-a7", .initfn = cortex_a7_initfn },
1026 { .name = "cortex-a8", .initfn = cortex_a8_initfn },
1027 { .name = "cortex-a9", .initfn = cortex_a9_initfn },
[all …]
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| H A D | cpu-v7m.c | 281 { .name = "cortex-m0", .initfn = cortex_m0_initfn,
283 { .name = "cortex-m3", .initfn = cortex_m3_initfn,
285 { .name = "cortex-m4", .initfn = cortex_m4_initfn,
287 { .name = "cortex-m7", .initfn = cortex_m7_initfn,
289 { .name = "cortex-m33", .initfn = cortex_m33_initfn,
291 { .name = "cortex-m55", .initfn = cortex_m55_initfn,
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| H A D | cpu64.c | 1314 { .name = "cortex-a35", .initfn = aarch64_a35_initfn },
1315 { .name = "cortex-a55", .initfn = aarch64_a55_initfn },
1316 { .name = "cortex-a72", .initfn = aarch64_a72_initfn },
1317 { .name = "cortex-a76", .initfn = aarch64_a76_initfn },
1318 { .name = "cortex-a710", .initfn = aarch64_a710_initfn },
1319 { .name = "a64fx", .initfn = aarch64_a64fx_initfn },
1320 { .name = "neoverse-n1", .initfn = aarch64_neoverse_n1_initfn },
1321 { .name = "neoverse-v1", .initfn = aarch64_neoverse_v1_initfn },
1322 { .name = "neoverse-n2", .initfn = aarch64_neoverse_n2_initfn },
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| /openbmc/qemu/include/hw/i386/ |
| H A D | pc.h | 301 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ argument
307 mc->init = initfn; \
320 #define DEFINE_PC_VER_MACHINE(namesym, namestr, initfn, isdefault, malias, ...) \ argument
324 initfn(machine); \
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| /openbmc/qemu/target/tricore/ |
| H A D | cpu.c | 225 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \ argument
228 .instance_init = initfn, \
|
| /openbmc/qemu/target/avr/ |
| H A D | cpu.c | 395 void (*initfn)(Object *obj); member
399 #define DEFINE_AVR_CPU_TYPE(model, initfn) \ argument
402 .instance_init = initfn, \
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| /openbmc/qemu/target/alpha/ |
| H A D | cpu.c | 300 #define DEFINE_ALPHA_CPU_TYPE(base_type, cpu_model, initfn) \ argument
303 .instance_init = initfn, \
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| /openbmc/qemu/target/openrisc/ |
| H A D | cpu.c | 303 #define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \ argument
306 .instance_init = initfn, \
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| /openbmc/qemu/target/sh4/ |
| H A D | cpu.c | 338 #define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \ argument
343 .instance_init = initfn, \
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| /openbmc/qemu/target/arm/ |
| H A D | cpu64.c | 800 { .name = "cortex-a57", .initfn = aarch64_a57_initfn },
801 { .name = "cortex-a53", .initfn = aarch64_a53_initfn },
802 { .name = "max", .initfn = aarch64_max_initfn },
804 { .name = "host", .initfn = aarch64_host_initfn },
|
| H A D | cpu.h | 1153 void (*initfn)(Object *obj); member
|
| H A D | cpu.c | 2778 acc->info->initfn(obj); in arm_cpu_instance_init()
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| /openbmc/qemu/target/hexagon/ |
| H A D | cpu.c | 379 #define DEFINE_CPU(type_name, initfn) \ argument
383 .instance_init = initfn \
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| /openbmc/qemu/target/loongarch/ |
| H A D | cpu.c | 993 #define DEFINE_LOONGARCH_CPU_TYPE(size, model, initfn) \ argument
996 .instance_init = initfn, \
|